printf ("sub class code =              0x%.2x\n", (uchar_t)pB->subClass);    printf ("programming interface =       0x%.2x\n", (uchar_t)pB->progIf);	    printf ("cache line =                  0x%.2x\n", (uchar_t)pB->cacheLine);    printf ("latency time =                0x%.2x\n", (uchar_t)pB->latency);    printf ("header type =                 0x%.2x\n", (uchar_t)pB->headerType);    printf ("BIST =                        0x%.2x\n", (uchar_t)pB->bist);    printf ("base address 0 =              0x%.8x\n", pB->base0);	    printf ("base address 1 =              0x%.8x\n", pB->base1);	    printf ("primary bus number =          0x%.2x\n", (uchar_t)pB->priBus);	    printf ("secondary bus number =        0x%.2x\n", (uchar_t)pB->secBus);	    printf ("subordinate bus number =      0x%.2x\n", (uchar_t)pB->subBus);	    printf ("secondary latency timer =     0x%.2x\n", (uchar_t)pB->secLatency);    printf ("IO base =                     0x%.2x\n", (uchar_t)pB->ioBase);    printf ("IO limit =                    0x%.2x\n", (uchar_t)pB->ioLimit);    printf ("secondary status =            0x%.4x\n", (ushort_t)pB->secStatus);    printf ("memory base =                 0x%.4x\n", (ushort_t)pB->memBase);    printf ("memory limit =                0x%.4x\n", (ushort_t)pB->memLimit);	    printf ("prefetch memory base =        0x%.4x\n", (ushort_t)pB->preBase);    printf ("prefetch memory limit =       0x%.4x\n", (ushort_t)pB->preLimit);    printf ("prefetch memory base upper =  0x%.8x\n", pB->preBaseUpper);    printf ("prefetch memory limit upper = 0x%.8x\n", pB->preLimitUpper);    printf ("IO base upper 16 bits =       0x%.4x\n", (ushort_t)pB->ioBaseUpper);    printf ("IO limit upper 16 bits =      0x%.4x\n", (ushort_t)pB->ioLimitUpper);    printf ("expansion ROM base address =  0x%.8x\n", pB->romBase);    printf ("interrupt line =              0x%.2x\n", (uchar_t)pB->intLine);    printf ("interrupt pin =               0x%.2x\n", (uchar_t)pB->intPin);	    printf ("bridge control =              0x%.4x\n", (ushort_t)pB->control);    }/*********************************************************************** pciFuncBarShow - show the value contained in a BAR** This function decodes the value of a single BAR on a single* bus,device,function, and prints the information to the terminal.** RETURNS: N/A.*/LOCAL void pciFuncBarShow    (    int bus,			/* bus */    int device,			/* device */    int function,		/* function */    int barNo			/* BAR index */    )    {    UINT32 barVal;    int space;    int prefetch;    int offset;    offset = PCI_CFG_BASE_ADDRESS_0 + (barNo * sizeof(UINT32));    pciConfigInLong(bus, device, function,	    	offset, &barVal);    /* check if BAR implemented */    if ( barVal == 0 || barVal == 0xffffffff )	return;    if ( ( barVal & 0x01 ) == 0x01 )	printf("\tbar%d in I/O space @ 0x%08x\n",			barNo, (barVal & (~0x00000001)));    else	{	prefetch = ( barVal >> 3 ) & 0x01;	space = (barVal >> 1 ) & 0x03;	barVal = barVal & ~ 0x0f;	printf("\tbar%d in %s%s mem space @ 0x%08x\n", barNo,	    prefetch ? "prefetchable " : "",	    ( space == 0x00 ) ? "32-bit" :	    ( space == 0x02) ? "64-bit" :	    "reserved",	    barVal);	}    }/*********************************************************************** pciStatusWordShow - show the decoded value of the status word.** This routine reads the status word from the specified* bus,device,function, and prints it in a human-readable format.** RETURNS: OK, always.*/LOCAL STATUS pciStatusWordShow    (    int bus,		/* bus */    int device,		/* device */    int function	/* function */    )    {    UINT16 status;    pciConfigInWord (bus, device, function, PCI_CFG_STATUS, &status);    printf("\tstatus=0x%04x (", status);    if ( status & PCI_STATUS_NEW_CAP )	printf(" CAP");    if ( status & PCI_STATUS_66_MHZ )	printf(" 66MHZ");    if ( status & PCI_STATUS_UDF )	printf(" UDF");    if ( status & PCI_STATUS_FAST_BB )	printf(" FBTB");    if ( status & PCI_STATUS_DATA_PARITY_ERR )	printf(" DATA_PARITY_ERR");    printf(" DEVSEL=%x", ((status & 0x0600) >> 9 ));    if ( status & PCI_STATUS_TARGET_ABORT_GEN )	printf(" TGT_ABORT_GEN");    if ( status & PCI_STATUS_TARGET_ABORT_RCV )	printf(" TGT_ABORT_RCV");    if ( status & PCI_STATUS_MASTER_ABORT_RCV )	printf(" MSTR_ABORT_RCV");    if ( status & PCI_STATUS_ASSERT_SERR )	printf(" ASSERT_SERR");    if ( status & PCI_STATUS_PARITY_ERROR )	printf(" PARITY_ERR");    printf(" )\n");    return(OK);    }/*********************************************************************** pciCmdWordShow - show the decoded value of the command word** This routine reads the command word from the specified* bus,device,function, and prints the value in a human readable* format.** RETURNS: OK, always.*/LOCAL STATUS pciCmdWordShow    (    int bus,		/* bus */    int device,		/* device */    int function	/* function */    )    {    UINT16 command;    pciConfigInWord (bus,device,function,		PCI_CFG_COMMAND, &command);    printf("\tcommand=0x%04x (", command);    if ( command & PCI_CMD_IO_ENABLE )	printf(" IO_ENABLE");    if ( command & PCI_CMD_MEM_ENABLE )	printf(" MEM_ENABLE");    if ( command & PCI_CMD_MASTER_ENABLE )	printf(" MASTER_ENABLE");    if ( command & PCI_CMD_MON_ENABLE )	printf(" MON_ENABLE");    if ( command & PCI_CMD_WI_ENABLE )	printf(" WI_ENABLE");    if ( command & PCI_CMD_SNOOP_ENABLE )	printf(" SNOOP_ENABLE");    if ( command & PCI_CMD_PERR_ENABLE )	printf(" PERR_ENABLE");    if ( command & PCI_CMD_WC_ENABLE )	printf(" WC_ENABLE");    if ( command & PCI_CMD_SERR_ENABLE )	printf(" SERR_ENABLE");    if ( command & PCI_CMD_FBTB_ENABLE )	printf(" FBTB_ENABLE");    printf(" )\n");    return(OK);    }/*********************************************************************** pciConfigStatusWordShow - show the decoded value of the status word** This routine reads the value of the status word for the specified* bus,device,function and prints the value in a human-readable format.** RETURNS: OK, always.*/STATUS pciConfigStatusWordShow    (    int bus,		/* bus */    int device,		/* device */    int function,	/* function */    void *pArg		/* ignored */    )    {    printf("[%d,%d,%d] ",bus,device,function);    pciStatusWordShow(bus,device,function);    return(OK);    }/*********************************************************************** pciConfigCmdWordShow - show the decoded value of the command word** This routine reads the value of the command word for the specified* bus,device,function and prints the value in a human-readable format.** RETURNS: OK, always.*/STATUS pciConfigCmdWordShow    (    int bus,		/* bus */    int device,		/* device */    int function,	/* function */    void *pArg		/* ignored */    )    {    printf("[%d,%d,%d] ",bus,device,function);    pciCmdWordShow(bus,device,function);    return(OK);    }/*********************************************************************** pciConfigFuncShow - show configuration details about a function** This routine reads various information from the specified* bus,device,function, and prints the information in a human-readable* format.** RETURNS: OK, always.*/STATUS pciConfigFuncShow    (    int bus,		/* bus */    int device,		/* device */    int function,	/* function */    void *pArg		/* ignored */    )    {    UINT8  clsCode;    UINT8  subClass;    UINT8  secBus;    int    numBars = 6;	/* most devices have 6, but not bridges */    UINT16 memBase;    UINT16 memLimit;    UINT32 memBaseU;    UINT32 memLimitU;    UINT8  ioBase;    UINT8  ioLimit;    UINT16 ioBaseU;    UINT16 ioLimitU;    UINT8  headerType;    UINT16 cmdReg;    printf("[%d,%d,%d] type=",bus,device,function);    pciConfigInByte (bus, device, function,			     PCI_CFG_CLASS, &clsCode);    pciConfigInByte(bus,device,function,			     PCI_CFG_HEADER_TYPE, &headerType);    if ( ( headerType & PCI_HEADER_TYPE_MASK ) == 1 )	{	/* type 1 header has only 2 BARs */	numBars = 2;	}    switch (clsCode)        {	case PCI_CLASS_PRE_PCI20: printf("BEFORE_STD\n"); break;	case PCI_CLASS_MASS_STORAGE: printf("MASS STORAGE\n"); break;	case PCI_CLASS_NETWORK_CTLR: printf("NET_CNTLR\n"); break;	case PCI_CLASS_DISPLAY_CTLR: printf("DISP_CNTLR\n"); break;	case PCI_CLASS_MMEDIA_DEVICE: printf("MULTI_MEDIA\n"); break;	case PCI_CLASS_MEM_CTLR: printf("MEM_CNTLR\n"); break;	case PCI_CLASS_COMM_CTLR: printf("COMMUNICATION\n"); break;	case PCI_CLASS_BASE_PERIPH: printf("PERIPHERAL\n"); break;	case PCI_CLASS_INPUT_DEVICE: printf("INPUT\n"); break;	case PCI_CLASS_DOCK_DEVICE: printf("DOCKING STATION\n"); break;	case PCI_CLASS_PROCESSOR: printf("PROCESSOR\n"); break;	case PCI_CLASS_SERIAL_BUS: printf("SERIAL BUS\n"); break;	case PCI_CLASS_WIRELESS: printf("WIRELESS\n"); break;	case PCI_CLASS_INTLGNT_IO: printf("INTELLIGENT_IO\n"); break;	case PCI_CLASS_SAT_COMM: printf("SATELLITE\n"); break;	case PCI_CLASS_EN_DECRYPTION: printf("ENCRYPTION DEV\n"); break;	case PCI_CLASS_DAQ_DSP: printf("DATA ACQUISITION DEV\n"); break;	case PCI_CLASS_UNDEFINED: printf("OTHER DEVICE\n"); break;	case PCI_CLASS_BRIDGE_CTLR:	    secBus = 0;	    pciConfigInByte (bus, device, function,				 PCI_CFG_SUBCLASS, &subClass);	    switch (subClass)		{		case PCI_SUBCLASS_HOST_PCI_BRIDGE: 		    printf("HOST"); 		    break;		case PCI_SUBCLASS_ISA_BRIDGE:		    printf("ISA");		    break;		case PCI_SUBCLASS_BRDG_EISA:		    printf("EISA");		    break;		case PCI_SUBCLASS_BRDG_MCA:		    printf("MC");		    break;		case PCI_SUBCLASS_P2P_BRIDGE:		    printf("P2P");		    pciConfigInByte (bus, device, function,				PCI_CFG_SECONDARY_BUS, &secBus);		    break;		case PCI_SUBCLASS_PCMCIA_BRIDGE:		    printf("PCMCIA");		    break;		case PCI_SUBCLASS_BRDG_CARDBUS:		    printf("CARDBUS");		    break;		case PCI_SUBCLASS_BRDG_RACEWAY:		    printf("RACEWAY");		    break;		default:		    printf("UNKNOWN (0x%02x)", subClass);		    break;		}	    printf(" BRIDGE");	    if ( secBus != 0 )		{		printf(" to [%d,0,0]", secBus); 		printf("\n");		pciConfigInWord(bus,device,function,				PCI_CFG_COMMAND, &cmdReg);		if ( cmdReg & PCI_CMD_MEM_ENABLE )		    {		    pciConfigInWord(bus,device,function,				PCI_CFG_MEM_BASE, &memBase);		    pciConfigInWord(bus,device,function,				PCI_CFG_MEM_LIMIT, &memLimit);		    printf("\tbase/limit:\n");		    printf("\t  mem=   0x%04x0000/0x%04xffff\n",			    memBase & 0xfff0, memLimit | 0x000f);		    pciConfigInWord(bus,device,function,				PCI_CFG_PRE_MEM_BASE, &memBase);		    pciConfigInWord(bus,device,function,				PCI_CFG_PRE_MEM_LIMIT, &memLimit);		    if ( ( memBase & 0x000f ) == 0x0001 )			{			/* 64-bit memory */			pciConfigInLong(bus,device,function,					PCI_CFG_PRE_MEM_BASE_U,					&memBaseU);			pciConfigInLong(bus,device,function,					PCI_CFG_PRE_MEM_LIMIT_U,					&memLimitU);			printf("\t  preMem=0x%08x%04x0000/"			       "0x%08x%04xffff\n",			    		memBaseU, memBase & 0xfff0, 			    		memLimitU, memLimit | 0x000f);			}		    else			printf("\t  preMem=0x%04x0000/0x%04xffff\n",			    memBase & 0xfff0, memLimit | 0x000f);		    }		if ( cmdReg & PCI_CMD_IO_ENABLE )		    {		    pciConfigInByte(bus,device,function,					PCI_CFG_IO_BASE, &ioBase);		    pciConfigInByte(bus,device,function,					PCI_CFG_IO_LIMIT, &ioLimit);		    if ( ( ioBase & 0x0f ) == 0x01 )			{			/* 32-bit I/O */			pciConfigInWord(bus,device,function,					PCI_CFG_IO_BASE_U, &ioBaseU);			pciConfigInWord(bus,device,function,					PCI_CFG_IO_LIMIT_U, &ioLimitU);			printf("\t  I/O=   0x%04x%02x00/0x%04x%02xff\n",					ioBaseU, (ioBase & 0xf0),					ioLimitU, (ioLimit | 0x0f));			}		    else			printf("\t  I/O=   0x%02x00/0x%02xff\n",			    (ioBase & 0xf0), (ioLimit | 0x0f));		    }		}	    else		printf("\n");	    break;	default:	    printf("UNKNOWN!\n");        }    pciStatusWordShow(bus, device, function);    pciCmdWordShow(bus, device, function);    pciFuncBarShow(bus, device, function, 0);    pciFuncBarShow(bus, device, function, 1);    if ( numBars > 2 )	{        pciFuncBarShow(bus, device, function, 2);        pciFuncBarShow(bus, device, function, 3);        pciFuncBarShow(bus, device, function, 4);        pciFuncBarShow(bus, device, function, 5);	}    return(OK);    }/*********************************************************************** pciConfigTopoShow - show PCI topology** This routine traverses the PCI bus and prints assorted information* about every device found.  The information is intended to present* the topology of the PCI bus.  In includes: (1) the device type, (2)* the command and status words, (3) for PCI to PCI bridges the memory* and I/O space configuration, and (4) the values of all implemented* BARs.** RETURNS: N/A.*/void pciConfigTopoShow()    {    pciConfigFuncShow(0,0,0,NULL);    pciConfigForeachFunc(0,TRUE,pciConfigFuncShow,NULL);    }