if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;        if (symbolrate < (u32)(XIN/32))	 SFIL = 0;        if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;        if (symbolrate < (u32)(XIN/64))	 SFIL = 0;        if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;        symbolrate <<= NDEC;        ratio = (symbolrate << 4) / FIN;        tmp =  ((symbolrate << 4) % FIN) << 8;        ratio = (ratio << 8) + tmp / FIN;        tmp = (tmp % FIN) << 8;        ratio = (ratio << 8) + (tmp + FIN/2) / FIN;        BDR = ratio;        BDRI = (((XIN << 5) / symbolrate) + 1) / 2;        if (BDRI > 0xFF)                BDRI = 0xFF;        SFIL = (SFIL << 4) | ves1820_inittab[0x0E];        NDEC = (NDEC << 6) | ves1820_inittab[0x03];        ves1820_writereg (fe, 0x03, NDEC);        ves1820_writereg (fe, 0x0a, BDR&0xff);        ves1820_writereg (fe, 0x0b, (BDR>> 8)&0xff);        ves1820_writereg (fe, 0x0c, (BDR>>16)&0x3f);        ves1820_writereg (fe, 0x0d, BDRI);        ves1820_writereg (fe, 0x0e, SFIL);        return 0;}static int ves1820_set_parameters (struct dvb_frontend *fe,			    struct dvb_frontend_parameters *p){	static const u8 reg0x00 [] = { 0x00, 0x04, 0x08, 0x0c, 0x10 };	static const u8 reg0x01 [] = {  140,  140,  106,  100,   92 };	static const u8 reg0x05 [] = {  135,  100,   70,   54,   38 };	static const u8 reg0x08 [] = {  162,  116,   67,   52,   35 };	static const u8 reg0x09 [] = {  145,  150,  106,  126,  107 };	int real_qam = p->u.qam.modulation - QAM_16;	if (real_qam < 0 || real_qam > 4)		return -EINVAL;	tuner_set_tv_freq (fe, p->frequency);	ves1820_set_symbolrate (fe, p->u.qam.symbol_rate);	ves1820_writereg (fe, 0x34, GET_PWM(fe->data));        ves1820_writereg (fe, 0x01, reg0x01[real_qam]);        ves1820_writereg (fe, 0x05, reg0x05[real_qam]);        ves1820_writereg (fe, 0x08, reg0x08[real_qam]);        ves1820_writereg (fe, 0x09, reg0x09[real_qam]);	ves1820_setup_reg0 (fe, reg0x00[real_qam], p->inversion);	/* yes, this speeds things up: userspace reports lock in about 8 ms	   instead of 500 to 1200 ms after calling FE_SET_FRONTEND. */	mdelay(50);	return 0;}static int ves1820_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg){        switch (cmd) {	case FE_GET_INFO:		memcpy (arg, &ves1820_info, sizeof(struct dvb_frontend_info));		break;        case FE_READ_STATUS:	{		fe_status_t *status = (fe_status_t *) arg;		int sync;		*status = 0;                sync = ves1820_readreg (fe, 0x11);		if (sync & 1)			*status |= FE_HAS_SIGNAL;		if (sync & 2)			*status |= FE_HAS_CARRIER;		if (sync & 2)           /* XXX FIXME! */			*status |= FE_HAS_VITERBI;		if (sync & 4)			*status |= FE_HAS_SYNC;		if (sync & 8)			*status |= FE_HAS_LOCK;		break;	}	case FE_READ_BER:	{		u32 ber = ves1820_readreg(fe, 0x14) |			 (ves1820_readreg(fe, 0x15) << 8) |			 ((ves1820_readreg(fe, 0x16) & 0x0f) << 16);		*((u32*) arg) = 10 * ber;		break;	}	case FE_READ_SIGNAL_STRENGTH:	{		u8 gain = ves1820_readreg(fe, 0x17);		*((u16*) arg) = (gain << 8) | gain;		break;	}	case FE_READ_SNR:	{		u8 quality = ~ves1820_readreg(fe, 0x18);		*((u16*) arg) = (quality << 8) | quality;		break;	}	case FE_READ_UNCORRECTED_BLOCKS:		*((u32*) arg) = ves1820_readreg (fe, 0x13) & 0x7f;		if (*((u32*) arg) == 0x7f)			*((u32*) arg) = 0xffffffff;		/* reset uncorrected block counter */		ves1820_writereg (fe, 0x10, ves1820_inittab[0x10] & 0xdf);	        ves1820_writereg (fe, 0x10, ves1820_inittab[0x10]);		break;        case FE_SET_FRONTEND:		return ves1820_set_parameters (fe, arg);	case FE_GET_FRONTEND:	{		struct dvb_frontend_parameters *p = (struct dvb_frontend_parameters *)arg;		u8 reg0 = GET_REG0(fe->data);		int sync;		s8 afc = 0;                sync = ves1820_readreg(fe, 0x11);		afc = ves1820_readreg(fe, 0x19);		if (verbose) {			/* AFC only valid when carrier has been recovered */			printk(sync & 2 ? "DVB: VES1820(%d): AFC (%d) %dHz\n" :					  "DVB: VES1820(%d): [AFC (%d) %dHz]\n",			       fe->i2c->adapter->num, afc,			       -((s32)p->u.qam.symbol_rate * afc) >> 10);		}		p->inversion = HAS_INVERSION(reg0) ? INVERSION_ON : INVERSION_OFF;		p->u.qam.modulation = ((reg0 >> 2) & 7) + QAM_16;		p->u.qam.fec_inner = FEC_NONE;		p->frequency = ((p->frequency + 31250) / 62500) * 62500;		if (sync & 2)			p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;		break;	}	case FE_SLEEP:		ves1820_writereg (fe, 0x1b, 0x02);  /* pdown ADC */		ves1820_writereg (fe, 0x00, 0x80);  /* standby */		break;        case FE_INIT:                return ves1820_init (fe);        default:                return -EINVAL;        }        return 0;}static long probe_tuner (struct dvb_i2c_bus *i2c){	static const struct i2c_msg msg1 =		{ .addr = 0x61, .flags = 0, .buf = NULL, .len = 0 };	static const struct i2c_msg msg2 =		{ .addr = 0x62, .flags = 0, .buf = NULL, .len = 0 };	int type;	if (i2c->xfer(i2c, &msg1, 1) == 1) {		type = 0;		printk ("DVB: VES1820(%d): setup for tuner spXXXX\n", i2c->adapter->num);	} else if (i2c->xfer(i2c, &msg2, 1) == 1) {		type = 1;		printk ("DVB: VES1820(%d): setup for tuner sp5659c\n", i2c->adapter->num);	} else {		type = -1;	}	return type;}static u8 read_pwm (struct dvb_i2c_bus *i2c){	u8 b = 0xff;	u8 pwm;	struct i2c_msg msg [] = { { .addr = 0x50, .flags = 0, .buf = &b, .len = 1 },			 { .addr = 0x50, .flags = I2C_M_RD, .buf = &pwm, .len = 1 } };	if ((i2c->xfer(i2c, msg, 2) != 2) || (pwm == 0xff))		pwm = 0x48;	printk("DVB: VES1820(%d): pwm=0x%02x\n", i2c->adapter->num, pwm);	return pwm;}static long probe_demod_addr (struct dvb_i2c_bus *i2c){	u8 b [] = { 0x00, 0x1a };	u8 id;	struct i2c_msg msg [] = { { .addr = 0x08, .flags = 0, .buf = b, .len = 2 },	                   { .addr = 0x08, .flags = I2C_M_RD, .buf = &id, .len = 1 } };	if (i2c->xfer(i2c, msg, 2) == 2 && (id & 0xf0) == 0x70)		return msg[0].addr;	msg[0].addr = msg[1].addr = 0x09;	if (i2c->xfer(i2c, msg, 2) == 2 && (id & 0xf0) == 0x70)		return msg[0].addr;	return -1;}static int ves1820_attach (struct dvb_i2c_bus *i2c, void **data){	void *priv = NULL;	long demod_addr;	long tuner_type;	if ((demod_addr = probe_demod_addr(i2c)) < 0)		return -ENODEV;	tuner_type = probe_tuner(i2c);	if ((i2c->adapter->num < MAX_UNITS) && pwm[i2c->adapter->num] != -1) {		printk("DVB: VES1820(%d): pwm=0x%02x (user specified)\n",				i2c->adapter->num, pwm[i2c->adapter->num]);		SET_PWM(priv, pwm[i2c->adapter->num]);	}	else		SET_PWM(priv, read_pwm(i2c));	SET_REG0(priv, ves1820_inittab[0]);	SET_TUNER(priv, tuner_type);	SET_DEMOD_ADDR(priv, demod_addr);	return dvb_register_frontend (ves1820_ioctl, i2c, priv, &ves1820_info);}static void ves1820_detach (struct dvb_i2c_bus *i2c, void *data){	dvb_unregister_frontend (ves1820_ioctl, i2c);}static int __init init_ves1820 (void){	int i;	for (i = 0; i < MAX_UNITS; i++)		if (pwm[i] < -1 || pwm[i] > 255)			return -EINVAL;	return dvb_register_i2c_device (THIS_MODULE,					ves1820_attach, ves1820_detach);}static void __exit exit_ves1820 (void){	dvb_unregister_i2c_device (ves1820_attach);}module_init(init_ves1820);module_exit(exit_ves1820);MODULE_PARM(pwm, "1-" __MODULE_STRING(MAX_UNITS) "i");MODULE_PARM_DESC(pwm, "override PWM value stored in EEPROM (tuner calibration)");MODULE_PARM(verbose, "i");MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");MODULE_DESCRIPTION("VES1820 DVB-C frontend driver");MODULE_AUTHOR("Ralph Metzler, Holger Waechtler");MODULE_LICENSE("GPL");