;/*************************************************************************/
;/*                                                                       */
;/* FILE NAME                                            VERSION          */
;/*                                                                       */
;/*      memory.s                            SNDS100 Board version 1.0    */
;/*                                                                       */
;/* COMPONENT                                                             */
;/*                                                                       */
;/*                                                                       */
;/* DESCRIPTION                                                           */
;/*                                                                       */
;/*     Memory MAP to run diagnostic code on SNDS100 Evaluation board.    */
;/*                                                                       */
;/*     * Change this file for fitting your applications.                 */
;/*                                                                       */
;/* AUTHOR    modified by hury                                            */
;/*                                                                       */
;/*                                                                       */
;/* DATA STRUCTURES                                                       */
;/*                                                                       */
;/*                                                                       */
;/* FUNCTIONS    define SDRAM address and remap inttrupt verctor          */
;/*                                                                       */
;/*                                                                       */
;/* DEPENDENCIES                                                          */
;/*                                                                       */
;/*      snds.s                              System constants             */
;/*                                                                       */
;/* HISTORY                                                               */
;/*                                                                       */
;//再說明幾個偽操作：^=MAP. #=field
;/*************************************************************************/
; Internal SRAM area

                ^       0x3FE0000		;//定義結(jié)構(gòu)化內(nèi)存表首地址的值為0x3FE0000
InterSramArea   #       8192			;//定義InterSramArea的長度為8192字節(jié)
ROM_AT_ADDRESS_ZERO EQU 0x1
;GBLL  ROM_AT_ADDRESS_ZERO
;ROM_AT_ADDRESS_ZERO   SETL   {TRUE}
;/*************************************************************************/
;/*  SYSTEM MEMORY CONTROL REGISTER EQU TABLES                            */
;/*************************************************************************/
;//map:  FLASH 0-2M    SDRAM  2-18M
;//***************Init***************
rEXTDBWTH_F		EQU		0x00002000
rROMCON0_F		EQU		0x02000060
rROMCON1_F  	EQU  	0x60
rROMCON2_F   	EQU  	0x60
rROMCON3_F   	EQU  	0x60
rROMCON4_F   	EQU  	0x60
rROMCON5_F   	EQU  	0x60
rSDRAMCON0_F   	EQU  	0x5200838A
rSDRAMCON1_F   	EQU  	0x00
rSDRAMCON2_F   	EQU  	0x00
rSDRAMCON3_F   	EQU  	0x00
rSREFEXTCON_F	EQU		0x9EB583FD

;//map:    SDRAM  0-16M  FLASH 16-18M
;************Memory Remap**************
rEXTDBWTH_R		EQU		0x00002000
rROMCON0_R		EQU		0x12040060
rROMCON1_R  	EQU  	0x60
rROMCON2_R   	EQU  	0x60
rROMCON3_R   	EQU  	0x60
rROMCON4_R   	EQU  	0x60
rROMCON5_R   	EQU  	0x60
rSDRAMCON0_R   	EQU  	0x5000038A
rSDRAMCON1_R   	EQU  	0x00
rSDRAMCON2_R   	EQU  	0x00
rSDRAMCON3_R   	EQU  	0x00
rSREFEXTCON_R	EQU		0x9EB583FD

;/***************************************************************/
;/*************************************************************************/
;/*  DRAM Memory Bank 0 area MAP for Exception vector table */
;/*  and Stack, User code area.                             */
;/*************************************************************************/
DRAM_BASE       EQU     0x1000000		;//16M
;DRAM_LIMIT      EQU     0x1800000		;//24M
DRAM_LIMIT      EQU     0x1400000		;//20M
;-------------------------------------------------
ExceptionSize    EQU     0x50            ; exception vector addr pointer space
SysStackSize     EQU     1024 * 8        ; Define 8K System stack
ExceptionTable   EQU     DRAM_BASE + ExceptionSize

;/* EXCEPTION HANDLER VECTOR TABLE */

	        ^	DRAM_BASE
HandleReset	    #	4
HandleUndef	    #	4
HandleSwi   	#	4
HandlePrefetch	#	4
HandleAbort	    #	4
HandleReserv	#	4
HandleIrq   	#	4
HandleFiq	    #	4

;/* SYSTEM USER CODE AREA  */

		^	DRAM_BASE+ExceptionSize ;=0x1000050
UserCodeArea	#	4


;/*************************************************************************/
;/* DRAM Memory Bank 1 area(NonCacheable region) */
;/*  for DMA(Direct Memory Access) function      */
;/*************************************************************************/

                ^      0x1400000
DmaCodeArea     #      4

                ^      0x1700000
UserFreeArea    #      4 
 
    END