?? sdram_init.c
字號:
/* * (C) Copyright 2001 * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA *//************************************************************************* * adaption for the Marvell DB64360 Board * Ingo Assmus (ingo.assmus@keymile.com) * * adaption for the cpci750 Board * Reinhard Arlt (reinhard.arlt@esd-electronics.com) *************************************************************************//* sdram_init.c - automatic memory sizing */#include <common.h>#include <74xx_7xx.h>#include "../../Marvell/include/memory.h"#include "../../Marvell/include/pci.h"#include "../../Marvell/include/mv_gen_reg.h"#include <net.h>#include "eth.h"#include "mpsc.h"#include "../../Marvell/common/i2c.h"#include "64360.h"#include "mv_regs.h"#undef DEBUG/* #define DEBUG */#ifdef CONFIG_PCI#define MAP_PCI#endif /* of CONFIG_PCI */#ifdef DEBUG#define DP(x) x#else#define DP(x)#endifint set_dfcdlInit(void); /* setup delay line of Mv64360 *//* ------------------------------------------------------------------------- */intmemory_map_bank(unsigned int bankNo, unsigned int bankBase, unsigned int bankLength){#ifdef MAP_PCI PCI_HOST host;#endif#ifdef DEBUG if (bankLength > 0) { printf("mapping bank %d at %08x - %08x\n", bankNo, bankBase, bankBase + bankLength - 1); } else { printf("unmapping bank %d\n", bankNo); }#endif memoryMapBank(bankNo, bankBase, bankLength);#ifdef MAP_PCI for (host=PCI_HOST0;host<=PCI_HOST1;host++) { const int features= PREFETCH_ENABLE | DELAYED_READ_ENABLE | AGGRESSIVE_PREFETCH | READ_LINE_AGGRESSIVE_PREFETCH | READ_MULTI_AGGRESSIVE_PREFETCH | MAX_BURST_4 | PCI_NO_SWAP; pciMapMemoryBank(host, bankNo, bankBase, bankLength); pciSetRegionSnoopMode(host, bankNo, PCI_SNOOP_WB, bankBase, bankLength); pciSetRegionFeatures(host, bankNo, features, bankBase, bankLength); }#endif return 0;}#define GB (1 << 30)/* much of this code is based on (or is) the code in the pip405 port *//* thanks go to the authors of said port - Josh *//* structure to store the relevant information about an sdram bank */typedef struct sdram_info { uchar drb_size; uchar registered, ecc; uchar tpar; uchar tras_clocks; uchar burst_len; uchar banks, slot;} sdram_info_t;/* Typedefs for 'gtAuxilGetDIMMinfo' function */typedef enum _memoryType {SDRAM, DDR} MEMORY_TYPE;typedef enum _voltageInterface {TTL_5V_TOLERANT, LVTTL, HSTL_1_5V, SSTL_3_3V, SSTL_2_5V, VOLTAGE_UNKNOWN, } VOLTAGE_INTERFACE;typedef enum _max_CL_supported_DDR {DDR_CL_1=1, DDR_CL_1_5=2, DDR_CL_2=4, DDR_CL_2_5=8, DDR_CL_3=16, DDR_CL_3_5=32, DDR_CL_FAULT} MAX_CL_SUPPORTED_DDR;typedef enum _max_CL_supported_SD {SD_CL_1=1, SD_CL_2, SD_CL_3, SD_CL_4, SD_CL_5, SD_CL_6, SD_CL_7, SD_FAULT} MAX_CL_SUPPORTED_SD;/* SDRAM/DDR information struct */typedef struct _gtMemoryDimmInfo{ MEMORY_TYPE memoryType; unsigned int numOfRowAddresses; unsigned int numOfColAddresses; unsigned int numOfModuleBanks; unsigned int dataWidth; VOLTAGE_INTERFACE voltageInterface; unsigned int errorCheckType; /* ECC , PARITY..*/ unsigned int sdramWidth; /* 4,8,16 or 32 */; unsigned int errorCheckDataWidth; /* 0 - no, 1 - Yes */ unsigned int minClkDelay; unsigned int burstLengthSupported; unsigned int numOfBanksOnEachDevice; unsigned int suportedCasLatencies; unsigned int RefreshInterval; unsigned int maxCASlatencySupported_LoP; /* LoP left of point (measured in ns) */ unsigned int maxCASlatencySupported_RoP; /* RoP right of point (measured in ns)*/ MAX_CL_SUPPORTED_DDR maxClSupported_DDR; MAX_CL_SUPPORTED_SD maxClSupported_SD; unsigned int moduleBankDensity; /* module attributes (true for yes) */ bool bufferedAddrAndControlInputs; bool registeredAddrAndControlInputs; bool onCardPLL; bool bufferedDQMBinputs; bool registeredDQMBinputs; bool differentialClockInput; bool redundantRowAddressing; /* module general attributes */ bool suportedAutoPreCharge; bool suportedPreChargeAll; bool suportedEarlyRasPreCharge; bool suportedWrite1ReadBurst; bool suported5PercentLowVCC; bool suported5PercentUpperVCC; /* module timing parameters */ unsigned int minRasToCasDelay; unsigned int minRowActiveRowActiveDelay; unsigned int minRasPulseWidth; unsigned int minRowPrechargeTime; /* measured in ns */ int addrAndCommandHoldTime; /* LoP left of point (measured in ns) */ int addrAndCommandSetupTime; /* (measured in ns/100) */ int dataInputSetupTime; /* LoP left of point (measured in ns) */ int dataInputHoldTime; /* LoP left of point (measured in ns) *//* tAC times for highest 2nd and 3rd highest CAS Latency values */ unsigned int clockToDataOut_LoP; /* LoP left of point (measured in ns) */ unsigned int clockToDataOut_RoP; /* RoP right of point (measured in ns)*/ unsigned int clockToDataOutMinus1_LoP; /* LoP left of point (measured in ns) */ unsigned int clockToDataOutMinus1_RoP; /* RoP right of point (measured in ns)*/ unsigned int clockToDataOutMinus2_LoP; /* LoP left of point (measured in ns) */ unsigned int clockToDataOutMinus2_RoP; /* RoP right of point (measured in ns)*/ unsigned int minimumCycleTimeAtMaxCasLatancy_LoP; /* LoP left of point (measured in ns) */ unsigned int minimumCycleTimeAtMaxCasLatancy_RoP; /* RoP right of point (measured in ns)*/ unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_LoP; /* LoP left of point (measured in ns) */ unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_RoP; /* RoP right of point (measured in ns)*/ unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_LoP; /* LoP left of point (measured in ns) */ unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_RoP; /* RoP right of point (measured in ns)*/ /* Parameters calculated from the extracted DIMM information */ unsigned int size; unsigned int deviceDensity; /* 16,64,128,256 or 512 Mbit */ unsigned int numberOfDevices; uchar drb_size; /* DRAM size in n*64Mbit */ uchar slot; /* Slot Number this module is inserted in */ uchar spd_raw_data[128]; /* Content of SPD-EEPROM copied 1:1 */#ifdef DEBUG uchar manufactura[8]; /* Content of SPD-EEPROM Byte 64-71 */ uchar modul_id[18]; /* Content of SPD-EEPROM Byte 73-90 */ uchar vendor_data[27]; /* Content of SPD-EEPROM Byte 99-125 */ unsigned long modul_serial_no; /* Content of SPD-EEPROM Byte 95-98 */ unsigned int manufac_date; /* Content of SPD-EEPROM Byte 93-94 */ unsigned int modul_revision; /* Content of SPD-EEPROM Byte 91-92 */ uchar manufac_place; /* Content of SPD-EEPROM Byte 72 */#endif} AUX_MEM_DIMM_INFO;/* * translate ns.ns/10 coding of SPD timing values * into 10 ps unit values */static inline unsigned shortNS10to10PS(unsigned char spd_byte){ unsigned short ns, ns10; /* isolate upper nibble */ ns = (spd_byte >> 4) & 0x0F; /* isolate lower nibble */ ns10 = (spd_byte & 0x0F); return(ns*100 + ns10*10);}/* * translate ns coding of SPD timing values * into 10 ps unit values */static inline unsigned shortNSto10PS(unsigned char spd_byte){ return(spd_byte*100);}/* This code reads the SPD chip on the sdram and populates * the array which is passed in with the relevant information *//* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo){ DECLARE_GLOBAL_DATA_PTR; unsigned long spd_checksum; uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR; int ret; unsigned int i, j, density = 1, devicesForErrCheck = 0;#ifdef DEBUG unsigned int k;#endif unsigned int rightOfPoint = 0, leftOfPoint = 0, mult, div, time_tmp; int sign = 1, shift, maskLeftOfPoint, maskRightOfPoint; uchar supp_cal, cal_val; ulong memclk, tmemclk; ulong tmp; uchar trp_clocks = 0, trcd_clocks, tras_clocks, trrd_clocks; uchar data[128]; memclk = gd->bus_clk; tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */ memset (data, 0, sizeof (data)); ret = 0; DP (puts ("before i2c read\n")); ret = i2c_read (addr, 0, 2, data, 128); DP (puts ("after i2c read\n")); if ((data[64] != 'e') || (data[65] != 's') || (data[66] != 'd') || (data[67] != '-') || (data[68] != 'g') || (data[69] != 'm') || (data[70] != 'b') || (data[71] != 'h')) { ret = -1; } if ((ret != 0) && (slot == 0)) { memset (data, 0, sizeof (data)); data[0] = 0x80; data[1] = 0x08; data[2] = 0x07; data[3] = 0x0c; data[4] = 0x09; data[5] = 0x01; data[6] = 0x48; data[7] = 0x00; data[8] = 0x04; data[9] = 0x75; data[10] = 0x80; data[11] = 0x02; data[12] = 0x80; data[13] = 0x10; data[14] = 0x08; data[15] = 0x01; data[16] = 0x0e; data[17] = 0x04; data[18] = 0x0c; data[19] = 0x01; data[20] = 0x02; data[21] = 0x20; data[22] = 0x00; data[23] = 0xa0; data[24] = 0x80; data[25] = 0x00; data[26] = 0x00; data[27] = 0x50; data[28] = 0x3c; data[29] = 0x50; data[30] = 0x32; data[31] = 0x10; data[32] = 0xb0; data[33] = 0xb0; data[34] = 0x60; data[35] = 0x60; data[64] = 'e'; data[65] = 's'; data[66] = 'd'; data[67] = '-'; data[68] = 'g'; data[69] = 'm'; data[70] = 'b'; data[71] = 'h'; ret = 0; } /* zero all the values */ memset (dimmInfo, 0, sizeof (*dimmInfo)); /* copy the SPD content 1:1 into the dimmInfo structure */ for (i = 0; i <= 127; i++) { dimmInfo->spd_raw_data[i] = data[i]; } if (ret) { DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret)); return 0; } else dimmInfo->slot = slot; /* start to fill up dimminfo for this "slot" */#ifdef CFG_DISPLAY_DIMM_SPD_CONTENT for (i = 0; i <= 127; i++) { printf ("SPD-EEPROM Byte %3d = %3x (%3d)\n", i, data[i], data[i]); }#endif#ifdef DEBUG /* find Manufacturer of Dimm Module */ for (i = 0; i < sizeof (dimmInfo->manufactura); i++) { dimmInfo->manufactura[i] = data[64 + i]; } printf ("\nThis RAM-Module is produced by: %s\n", dimmInfo->manufactura); /* find Manul-ID of Dimm Module */ for (i = 0; i < sizeof (dimmInfo->modul_id); i++) { dimmInfo->modul_id[i] = data[73 + i]; } printf ("The Module-ID of this RAM-Module is: %s\n", dimmInfo->modul_id); /* find Vendor-Data of Dimm Module */ for (i = 0; i < sizeof (dimmInfo->vendor_data); i++) { dimmInfo->vendor_data[i] = data[99 + i]; } printf ("Vendor Data of this RAM-Module is: %s\n", dimmInfo->vendor_data); /* find modul_serial_no of Dimm Module */ dimmInfo->modul_serial_no = (*((unsigned long *) (&data[95]))); printf ("Serial No. of this RAM-Module is: %ld (%lx)\n", dimmInfo->modul_serial_no, dimmInfo->modul_serial_no); /* find Manufac-Data of Dimm Module */ dimmInfo->manufac_date = (*((unsigned int *) (&data[93]))); printf ("Manufactoring Date of this RAM-Module is: %d.%d\n", data[93], data[94]); /*dimmInfo->manufac_date */ /* find modul_revision of Dimm Module */ dimmInfo->modul_revision = (*((unsigned int *) (&data[91]))); printf ("Module Revision of this RAM-Module is: %d.%d\n", data[91], data[92]); /* dimmInfo->modul_revision */ /* find manufac_place of Dimm Module */ dimmInfo->manufac_place = (*((unsigned char *) (&data[72]))); printf ("manufac_place of this RAM-Module is: %d\n", dimmInfo->manufac_place);#endif/*------------------------------------------------------------------------------------------------------------------------------*//* calculate SPD checksum *//*------------------------------------------------------------------------------------------------------------------------------*/ spd_checksum = 0;#if 0 /* test-only */ for (i = 0; i <= 62; i++) { spd_checksum += data[i]; } if ((spd_checksum & 0xff) != data[63]) { printf ("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int) (spd_checksum & 0xff), data[63]); hang (); } else printf ("SPD Checksum ok!\n");#endif /* test-only */
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -