/* * (C) Copyright 2001 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#include <common.h>#include "ocrtc.h"#include <asm/processor.h>#include <i2c.h>#include <command.h>extern void lxt971_no_sleep(void);int board_early_init_f (void){	/*	 * IRQ 0-15  405GP internally generated; active high; level sensitive	 * IRQ 16    405GP internally generated; active low; level sensitive	 * IRQ 17-24 RESERVED	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive	 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive	 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive	 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive	 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive	 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive	 */	mtdcr (uicsr, 0xFFFFFFFF);	/* clear all ints */	mtdcr (uicer, 0x00000000);	/* disable all ints */	mtdcr (uiccr, 0x00000000);	/* set all to be non-critical */	mtdcr (uicpr, 0xFFFFFF81);	/* set int polarities */	mtdcr (uictr, 0x10000000);	/* set int trigger levels */	mtdcr (uicvcr, 0x00000001);	/* set vect base=0,INT0 highest priority */	mtdcr (uicsr, 0xFFFFFFFF);	/* clear all ints */	/*	 * EBC Configuration Register: clear EBTC -> high-Z ebc signals between	 * transfers, set device-paced timeout to 256 cycles	 */	mtebc (epcr, 0x20400000);	return 0;}int misc_init_f (void){	return 0;					/* dummy implementation */}/* * Check Board Identity: */int checkboard (void){	char str[64];	int i = getenv_r ("serial#", str, sizeof (str));	puts ("Board: ");	if (i == -1) {#ifdef CONFIG_OCRTC		puts ("### No HW ID - assuming OCRTC");#endif#ifdef CONFIG_ORSG		puts ("### No HW ID - assuming ORSG");#endif	} else {		puts (str);	}	putc ('\n');	/*	 * Disable sleep mode in LXT971	 */	lxt971_no_sleep();	return (0);}long int initdram (int board_type){	unsigned long val;	mtdcr (memcfga, mem_mb0cf);	val = mfdcr (memcfgd);#if 0	printf ("\nmb0cf=%x\n", val);	/* test-only */	printf ("strap=%x\n", mfdcr (strap));	/* test-only */#endif	return (4 * 1024 * 1024 << ((val & 0x000e0000) >> 17));}int testdram (void){	/* TODO: XXX XXX XXX */	printf ("test: 16 MB - ok\n");	return (0);}