?? main.asm
字號:
;The code is run on 56F8300Demo board and CW ver7.2 for 56F800/E
;The example demo how to write data Flash following the instruction in the UM
;Note:The Falsh writting is executed in ISR,after press IRQA,the Flash will be written
;Flash writting is finished by a state machine,the procedure is following:
;1)because FFM_CLKD can be written only once after reset,checking if it has been written is necessary
;2)Clear KEYACC bit to disable Security Key Writing and setting Flash bank for example P&B or D
;3)checking the lock bit in FM_CR so that you can update the protect reg
;4)page erase:
; A:write page_erase command to FM_CMD
; B:write any data to Flash address which will be erased
; C:set CBEIF bit in FM_USTAT to launch the command
; D:check if error has occured
; E:check the two bits CBEIF&CCIF to check if the command is over
; F:continue
;5)page programe
; A:write page_erase command to FM_CMD
; B:write data to Flash address which will be programed
; C:set CBEIF bit in FM_USTAT to launch the command
; D:check if error has occured
; E:check the two bits CBEIF&CCIF to check if the command is over
; F:continue
;
;;
;
FM_BASE EQU $00F400
; metrowerks sample code
;Flash memory register address
FFM_CLKD EQU FM_BASE+0
FFM_CR EQU FM_BASE+1
FFM_SECH EQU FM_BASE+3
FFM_SECL EQU FM_BASE+4
FFM_PROT EQU FM_BASE+$10
FFM_PROTB EQU FM_BASE+$11
FFM_USTAT EQU FM_BASE+$13
FFM_CMD EQU FM_BASE+$14
;FFM_OPOT0 EQU FM_BASE+$1A
;FFM_OPOT1 EQU FM_BASE+$1B
;FFM_OPOT1 EQU FM_BASE+$1C
;GPIOA register address
GPIOA_BASE equ $F2E0
GPIOA_PER equ GPIOA_BASE+$3
GPIOA_DDR equ GPIOA_BASE+$2
GPIOA_DR equ GPIOA_BASE+$1
;GPIOB register address
GPIOB_BASE equ $F300
GPIOB_PER equ GPIOB_BASE+$3
GPIOB_DDR equ GPIOB_BASE+$2
GPIOB_DR equ GPIOB_BASE+$1
IPR2 equ $F1A2
ICTL equ $F1BD
DATA_FLASH_ADDRESS_8323 equ $1000
DATAFLASH_PAGE_SIZE equ $100
PROG_FLASH_ADDRESS_8323 equ $3F00
section rtlib
org p:
global Fmain
GLOBAL M56832x_IRQA
SUBROUTINE "Fmain",Fmain,FmainEND-Fmain
; assembly level entry point
Fmain:
nop ; do nothing
nop
;enable interrupt
bfset #$0001,x:>>ICTL ;set falling edge of IRQA to trigger interrupt
bfclr #$0300,sr
bfset #$000F,X:>>IPR2
;configure the red led pin on 56F8323Demo board
move.w #$0000,x:>>GPIOA_PER
bfset #$0FFF,x:>>GPIOA_DDR
bfclr #$0FFF,x:>>GPIOA_DR ;led off
move.w #$0000,x:>>GPIOB_PER
bfset #$000F,x:>>GPIOB_DDR
bfclr #$000F,x:>>GPIOB_DR ;led off
;WAIT4:
nop
;red led on
moveu.w #DATA_FLASH_ADDRESS_8323,r0
moveu.w #DATAFLASH_PAGE_SIZE,LC
clr A
doslc endloop1
move.w x:(r0)+,y0
cmp.w y0,A
jne label1
inc.w A
nop
endloop1:
nop
jmp WAIT3
nop
label1: bfset #$0001,x:>>GPIOA_DR ;red led on
WAIT3:
nop
nop
nop
nop
jmp WAIT3 ;forever loop
FmainEND:
;IRQA interrupt service routine
M56832x_IRQA:
nop
nop
;setting Flash clock
;checking if the clock reg has been written
bftstl #$0080,x:>>FFM_CLKD ;check the DIVLD bit
jcc LABEL1
move.w #$0052,x:>>FFM_CLKD
LABEL1: nop
;select data Flash
bfset #$0001,x:>>FFM_CR
;Clear KEYACC bit to disable Security Key Writing
bfclr #$0020,x:>>FFM_CR
;checking the lock bit in FM_CR
bftstl #$0400,x:>>FFM_CR
jcs LABEL2
debughlt ;protect reg writting is forbidden
LABEL2:
bfclr #$FFFF,x:>>FFM_PROT ; writing data ptotect reg to eneble all section
WAIT: nop
bftstl #$0080,x:>>FFM_USTAT
jcs WAIT
nop
nop
nop
nop
;page erase
;erase section 0
move.w #$0000,x:DATA_FLASH_ADDRESS_8323
move.w #$40,x:>>FFM_CMD
bfset #$0080,x:>>FFM_USTAT
bftsth #$0010,x:>>FFM_USTAT
jcs ERROR
bftsth #$0020,x:>>FFM_USTAT
jcs ERROR
WAIT1: nop
bftstl #$00C0,x:>>FFM_USTAT
jcs WAIT1
nop
nop
nop
nop
;finish the page eraseing process
;programe data Flash
moveu.w #DATA_FLASH_ADDRESS_8323,r0
moveu.w #DATAFLASH_PAGE_SIZE,LC
nop
nop
clr A
doslc endloop
move.w A1,x:(r0)+
inc.w A
move.w #$20,x:>>FFM_CMD
bfset #$0080,x:>>FFM_USTAT
bftsth #$0010,x:>>FFM_USTAT
jcs ERROR
bftsth #$0020,x:>>FFM_USTAT
jcs ERROR
WAIT2: nop
bftstl #$00C0,x:>>FFM_USTAT
jcs WAIT2
endloop
nop
;Clear KEYACC bit to disable Security Key Writing
; bfset #$0020,x:>>FFM_CR
nop
debughlt
rti
ERROR:
nop
debughlt
rti
M56832x_IRQAEND
endsec
end
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