?? os_cpu_c.c
字號:
__asm
{
tpa // copy the value of CCR to the register A
staa os_cpu_sr
sei // Disable interrupts
}
}
void OSCPURestoreSR(OS_CPU_SR os_cpu_sr)
{
__asm
{
ldaa os_cpu_sr
tap // A contains the CCR value to restore, move to CCR
}
}
/*********************************************************************************************************
;********************************************************************************************************
; START HIGHEST PRIORITY TASK READY-TO-RUN
;
; Description : This function is called by OSStart() to start the highest priority task that was created
; by your application before calling OSStart().
;
; Arguments : none
;
; Note(s) : 1) The stack frame is assumed to look as follows:
;
; OSTCBHighRdy->OSTCBStkPtr + 0 --> PPAGE
; + 1 CCR
; + 2 B
; + 3 A
; + 4 X (H)
; + 5 X (L)
; + 6 Y (H)
; + 7 Y (L)
; + 8 PC(H)
; + 9 PC(L)
;
; 2) OSStartHighRdy() MUST:
; a) Call OSTaskSwHook() then,
; b) Set OSRunning to TRUE,
; c) Switch to the highest priority task by loading the stack pointer of the
; highest priority task into the SP register and execute an RTI instruction.
;********************************************************************************************************
;********************************************************************************************************/
#pragma CODE_SEG NON_BANKED
#pragma TRAP_PROC
void OSStartHighRdy(void)
{
#if OS_CPU_HOOKS_EN > 0
OSTaskSwHook(); /* 4~, Invoke user defined context switch hook */
#endif
__asm{
inc OSRunning ;2~, Indicate that we are multitasking
ldx OSTCBHighRdy ;3~, Point to TCB of highest priority task ready to run
lds 0,x ;3~, Load SP into 68HC12
}
}
/********************************************************************************************************
;********************************************************************************************************
; TASK LEVEL CONTEXT SWITCH
;
; Description : This function is called when a task makes a higher priority task ready-to-run.
;
; Arguments : none
;
; Note(s) : 1) Upon entry,
; OSTCBCur points to the OS_TCB of the task to suspend
; OSTCBHighRdy points to the OS_TCB of the task to resume
;
; 2) The stack frame of the task to suspend looks as follows:
;
; SP + 0 --> PPAGE
; + 1 CCR
; + 2 B
; + 3 A
; + 4 X (H)
; + 5 X (L)
; + 6 Y (H)
; + 7 Y (L)
; + 8 PC(H)
; + 9 PC(L)
;
; 3) The stack frame of the task to resume looks as follows:
;
; OSTCBHighRdy->OSTCBStkPtr + 0 --> PPAGE
; + 1 CCR
; + 2 B
; + 3 A
; + 4 X (H)
; + 5 X (L)
; + 6 Y (H)
; + 7 Y (L)
; + 8 PC(H)
; + 9 PC(L)
;********************************************************************************************************
;*********************************************************************************************************/
#pragma TRAP_PROC
void OSCtxSw(void)
{
__asm{
ldx OSTCBCur ; 3~, OSTCBCur->OSTCBStkPtr = Stack Pointer
sts 0,x ; 3~
}
#if OS_CPU_HOOKS_EN > 0
OSTaskSwHook(); /* 4~, Invoke user defined context switch hook */
#endif
__asm{
ldx OSTCBHighRdy ; 3~, OSTCBCur = OSTCBHighRdy
stx OSTCBCur ; 3~
ldab OSPrioHighRdy ; 3~, OSPrioCur = OSPrioHighRdy
stab OSPrioCur ; 3~
lds 0,x ; 3~, Load SP into 68HC12
}
}
/********************************************************************************************************
;********************************************************************************************************
; INTERRUPT LEVEL CONTEXT SWITCH
;
; Description : This function is called by OSIntExit() to perform a context switch to a task that has
; been made ready-to-run by an ISR.
;
; Arguments : none
;********************************************************************************************************
;********************************************************************************************************/
#pragma TRAP_PROC
void OSIntCtxSw(void)
{
#if OS_CPU_HOOKS_EN > 0
OSTaskSwHook(); /* 4~, Invoke user defined context switch hook */
#endif
__asm{
ldx OSTCBHighRdy ; 3~, OSTCBCur = OSTCBHighRdy
stx OSTCBCur ; 3~
ldab OSPrioHighRdy ; 3~, OSPrioCur = OSPrioHighRdy
stab OSPrioCur ; 3~
lds 0,x ; 3~, Load SP into 68HC12
}
}
/*********************************************************************************************************
;********************************************************************************************************
; SYSTEM TICK ISR
;
; Description : This function is the ISR used to notify uC/OS-II that a system tick has occurred. You
; must setup the 68HC12's interrupt vector table so that an OUTPUT COMPARE interrupt
; vectors to this function.
;
; Arguments : none
;
; Notes : 1) The 'tick ISR' assumes the we are using the Output Compare specified by OS_TICK_OC
; (see OS_CFG.H and this file) to generate a tick that occurs every OS_TICK_OC_CNTS
; (see OS_CFG.H and this file) which corresponds to the number of FRT (Free Running
; Timer) counts to the next interrupt.
;
; 2) You must specify which output compare will be used by the tick ISR as follows:
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 0 to use OUTPUT COMPARE #0
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 1 to use OUTPUT COMPARE #1
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 2 to use OUTPUT COMPARE #2
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 3 to use OUTPUT COMPARE #3
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 4 to use OUTPUT COMPARE #4
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 5 to use OUTPUT COMPARE #5
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 6 to use OUTPUT COMPARE #6
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 7 to use OUTPUT COMPARE #7
;
; 3) TFLG1, TC0 ... TC7 are defined in 6812dp256.h.
;********************************************************************************************************
;********************************************************************************************************/
#pragma TRAP_PROC
void OSTickISR(void)
{
asm inc OSIntNesting; // 4~, Notify uC/OS-II about ISR
if (OSIntNesting == 1){ // 4~, if (OSIntNesting == 1) {
__asm
{
ldy OSTCBCur // 3~, OSTCBCur->OSTCBStkPtr = Stack Pointer
sts 0,y // 3~,}
}
}
#if OS_TICK_OC == 0
__asm{
ldab #$01 ; 2~, Clear C0F interrupt flag (bit 0)
stab TFLG1 ; 4~
ldd TC0 ; 5~, Set TC0 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC0 ; 5~
}
#endif
#if OS_TICK_OC == 1
__asm{
ldab #$02 ; 2~, Clear C1F interrupt flag (bit 1)
stab TFLG1 ; 4~
ldd TC1 ; 5~, Set TC1 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC1 ; 5~
}
#endif
#if OS_TICK_OC == 2
__asm{
ldab #$04 ; 2~, Clear C2F interrupt flag (bit 2)
stab TFLG1 ; 4~
ldd TC2 ; 5~, Set TC2 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC2 ; 5~
}
#endif
#if OS_TICK_OC == 3
__asm{
ldab #$08 ; 2~, Clear C3F interrupt flag (bit 3)
stab TFLG1 ; 4~
ldd TC3 ; 5~, Set TC3 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC3 ; 5~
}
#endif
#if OS_TICK_OC == 4
__asm{
ldab #$10 ; 2~, Clear C4F interrupt flag (bit 4)
stab TFLG1 ; 4~
ldd TC4 ; 5~, Set TC4 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC4 ; 5~
}
#endif
#if OS_TICK_OC == 5
__asm{
ldab #$20 ; 2~, Clear C5F interrupt flag (bit 5)
stab TFLG1 ; 4~
ldd TC5 ; 5~, Set TC5 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC5 ; 5~
}
#endif
#if OS_TICK_OC == 6
__asm{
ldab #$40 ; 2~, Clear C6F interrupt flag (bit 6)
stab TFLG1 ; 4~
ldd TC6 ; 5~, Set TC6 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC6 ; 5~
}
#endif
#if OS_TICK_OC == 7
__asm{
ldab #$80 ; 2~, Clear C7F interrupt flag (bit 7)
stab TFLG1 ; 4~
ldd TC7 ; 5~, Set TC7 to present time + desired counts to next ISR
addd #OS_TICK_OC_CNTS ; 4~
std TC7 ; 5~
}
#endif
asm cli; /* 2~, Enable interrupts to allow interrupt nesting*/
OSTimeTick(); /* 6~+, Call uC/OS-II's tick updating function */
OSIntExit (); /* 6~+, Notify uC/OS-II about end of ISR */
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