;/*************************************************************************************
;*	Copyright (c) 2005 by National ASIC System Engineering Research Center.
;*	PROPRIETARY RIGHTS of ASIC are involved in the subject matter of this 
;*	material.  All manufacturing, reproduction, use, and sales rights 
;*	pertaining to this subject matter are governed by the license agreement.
;*	The recipient of this software implicitly accepts the terms of the license.
;*
;*	File Name: head_gfd.s
;*
;*	File Description:
;*			The file define some macro definition used in some assembler file.
;*		
;*	Created by Michael <yuyu_zh@seu.edu.cn>, 2005-03-22
;**************************************************************************************/
	
	include asm.h
	
	extern	main
	
	AREA BOOT, CODE, READONLY                                                     
	       ENTRY                           		; Mark first instruction to execute 
	
	ldr		sp, =SP_SVC  		;init sp_svc
	
	mov		r1, #0xD2			;chmod to irq and init sp_irq
	msr		cpsr_cf, r1   
	ldr		sp, =SP_IRQ
	
	mov		r1, #0XD1			;chomod to fiq and init sp_fiq
    msr		cpsr_cf, r1   
    ldr		sp, =SP_FIQ  
	
	mov		r1, #0XD7			;chomod to abt and init sp_ABT
   	msr		cpsr_cf, r1   
    ldr		sp, =SP_ABT 
	
	mov		r1, #0XDB			;chomod to undf and init sp_UNDF
    msr		cpsr_cf, r1   
    ldr		sp, =SP_UND 	
    
    								;chomod to abt and init sp_sys
	mov 	r1, #0xDF			;all interrupts disabled      
    msr		cpsr_cxsf, r1   		;SYSTEM mode, @32-bit code mode     
    ldr		sp, =SP_SYS   	
    
    mov		r1, #0XD3			;chmod to svc modle, CPSR IRQ bit  is disable
    msr		cpsr_c, r1

;******************************************************************
; 	using EMI default value and remap memory zero address to SDRAM
;******************************************************************

	ldr		r1, =0x11000010        ;REMAP
	ldr		r2, =0x0b
	str		r2, [ r1 ]
	
;***************************************************************
;    	enable CPSR IRQ bit
;***************************************************************
  	mrs		r1, cpsr
	bic		r1, r1, #0x80  		;set bit7 to zero
	msr		cpsr_c, r1

;***************************************************************
;	jump to main function
;***************************************************************
	IMPORT	__main
	b		__main 

	END