#ifndef _AD6620_H
#define _AD6620_H

#define SDB_AD6620    180000

/* AD6620 Control Code */
#define SDC_REINITE                 (SDB_AD6620+0)
#define SDC_GET_REG                 (SDB_AD6620+1)
#define SDC_INIT_STATUS				(SDB_AD6620+2)
#define SDC_SET_NCO_FREQ            (SDB_AD6620+4)
#define SDC_SET_NCO_PHOFF           (SDB_AD6620+5)
#define SDC_SET_CIC2_SCA            (SDB_AD6620+6)
#define SDC_SET_CIC5_SCA            (SDB_AD6620+7)
#define SDC_SET_OUT_SCA             (SDB_AD6620+8)
#define SDC_SET_RCF_ADDOFF          (SDB_AD6620+9)

/* AD6620 INTERNAL REGISTER */
#define AD6620_CO_RAM            (unsigned short)0x000
#define AD6620_IQ_RAM            (unsigned short)0x100
#define AD6620_MODE_REG          (unsigned short)0x300
#define AD6620_NCO_CON_REG       (unsigned short)0x301
#define AD6620_NCO_SYN_REG       (unsigned short)0x302
#define AD6620_NCO_FREQ          (unsigned short)0x303
#define AD6620_NCO_PH_OFF        (unsigned short)0x304
#define AD6620_SCIC2             (unsigned short)0x305
#define AD6620_MCIC2             (unsigned short)0x306
#define AD6620_SCIC5             (unsigned short)0x307
#define AD6620_MCIC5             (unsigned short)0x308 
#define AD6620_RCF_CON_REG       (unsigned short)0x309
#define AD6620_MRCF              (unsigned short)0x30A
#define AD6620_RCF_ADD_REG       (unsigned short)0x30B
#define AD6620_NTAPS             (unsigned short)0x30C
#define AD6620_INRESERVED        (unsigned short)0x30D

/* AD6620 EXTERNAL REGISTER */
#define AD6620_DATA0             (unsigned char)0x000   /* D7-D0   */
#define AD6620_DATA1             (unsigned char)0x001   /* D15-D8  */
#define AD6620_DATA2             (unsigned char)0x002   /* D23-D16 */
#define AD6620_DATA3             (unsigned char)0x003   /* D31-D24 */
#define AD6620_DATA4             (unsigned char)0x004   /* D35-D32 */
#define AD6620_LAR               (unsigned char)0x006   /* LOW ADD */
#define AD6620_AMR               (unsigned char)0x007   /* HIG ADD */ 
#define AD6620_EXRESVERED        (unsigned char)0x005   /* No Used */

typedef struct{
    ULONG Nco_Freq;             /* The Channel Frequency for NCO Tuning */
    unsigned short Nco_Phoff;   /* NCO Phase Offset,No used,Set up to 0 */
    unsigned char Chip_Mode;    /* 0:Single ch; 1:Dual ch; 2:Single Complex ch */
    unsigned char Nco_Bypass;   /* 0:No; 1:Bypass */
    unsigned char Pha_Dither;   /* 0:Phase Dither Dis; 1:Phase Dither En */
    unsigned char Amp_Dither;   /* 0:Amplitude Dither Dis; 1:Amplitude Dither En */
    unsigned char Scic2_Sca;    /* 2nd Filter Scale Factor Scic2:0-6 */
    unsigned char Mcic2_Dec;    /* Cic2 Decimation Mcic2:1-15 */
    unsigned char Scic5_Sca;    /* 5th Filter Scale Factor Scic5:0-20 */
    unsigned char Mcic5_Dec;    /* Cic2 Decimation Mcic5:1-31 */
    unsigned char Out_Sca;      /* Outout Scale Factor */
    unsigned char Rcf_Dec;      /* RCF Decimation Mrcf:1-31 */
    unsigned char Rcf_AddOff;   /* Filter Coefficient Address Offset */   
    unsigned char Taps;         /* Number of Taps Minus One */
    }AD6620RegValue;

typedef struct{
    unsigned short MemAdd;      /* Data Memory Address */
    ULONG MemDat[2];             /* Data Value */
    }AD6620MemValue;

typedef struct{
    AD6620RegValue RegValue;
    ULONG Coefficient[256];
    }AD6620CfgStruct;

char *AD6620BspInit(int DEV, char *FreeMemPtr, AD6620CfgStruct *pCfg);

#endif /* _AD6620_H */