////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2003 Xilinx, Inc.
// All Right Reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____ 
//  /   /\/   / 
// /___/  \  /    Vendor: Xilinx 
// \   \   \/     Version : 7.1.03i
//  \   \         Application : ISE Foundation
//  /   /         Filename : eexywave.ant
// /___/   /\     Timestamp : Sat Jun 02 12:32:44 2007
// \   \  /  \ 
//  \___\/\___\ 
//
//Command: 
//Design Name: eexywave
//Device: Xilinx
//
`timescale 1ns/1ps

module eexywave;
    reg [15:0] eer = 16'b0000000000000000;
    reg [15:0] eei = 16'b0000000000000000;
    reg [15:0] yx0r = 16'b0000000000000000;
    reg [15:0] yx0i = 16'b0000000000000000;
    reg [15:0] yx1r = 16'b0000000000000000;
    reg [15:0] yx1i = 16'b0000000000000000;
    reg [15:0] yx2r = 16'b0000000000000000;
    reg [15:0] yx2i = 16'b0000000000000000;
    reg [15:0] yx3r = 16'b0000000000000000;
    reg [15:0] yx3i = 16'b0000000000000000;
    reg [15:0] yx4r = 16'b0000000000000000;
    reg [15:0] yx4i = 16'b0000000000000000;
    reg [15:0] yx5r = 16'b0000000000000000;
    reg [15:0] yx5i = 16'b0000000000000000;
    reg [15:0] yx6r = 16'b0000000000000000;
    reg [15:0] yx6i = 16'b0000000000000000;
    reg [15:0] yx7r = 16'b0000000000000000;
    reg [15:0] yx7i = 16'b0000000000000000;
    wire [15:0] tey0r;
    wire [15:0] tey0i;
    wire [15:0] tey1r;
    wire [15:0] tey1i;
    wire [15:0] tey2r;
    wire [15:0] tey2i;
    wire [15:0] tey3r;
    wire [15:0] tey3i;
    wire [15:0] tey4r;
    wire [15:0] tey4i;
    wire [15:0] tey5r;
    wire [15:0] tey5i;
    wire [15:0] tey6r;
    wire [15:0] tey6i;
    wire [15:0] tey7r;
    wire [15:0] tey7i;
    reg clk = 1'b0;
    reg start = 1'b0;
    wire rdy;

    parameter PERIOD = 200;
    parameter real DUTY_CYCLE = 0.5;
    parameter OFFSET = 0;

    initial    // Clock process for clk
    begin
        #OFFSET;
        forever
        begin
            clk = 1'b0;
            #(PERIOD-(PERIOD*DUTY_CYCLE)) clk = 1'b1;
            #(PERIOD*DUTY_CYCLE);
        end
    end

    eexy UUT (
        .eer(eer),
        .eei(eei),
        .yx0r(yx0r),
        .yx0i(yx0i),
        .yx1r(yx1r),
        .yx1i(yx1i),
        .yx2r(yx2r),
        .yx2i(yx2i),
        .yx3r(yx3r),
        .yx3i(yx3i),
        .yx4r(yx4r),
        .yx4i(yx4i),
        .yx5r(yx5r),
        .yx5i(yx5i),
        .yx6r(yx6r),
        .yx6i(yx6i),
        .yx7r(yx7r),
        .yx7i(yx7i),
        .tey0r(tey0r),
        .tey0i(tey0i),
        .tey1r(tey1r),
        .tey1i(tey1i),
        .tey2r(tey2r),
        .tey2i(tey2i),
        .tey3r(tey3r),
        .tey3i(tey3i),
        .tey4r(tey4r),
        .tey4i(tey4i),
        .tey5r(tey5r),
        .tey5i(tey5i),
        .tey6r(tey6r),
        .tey6i(tey6i),
        .tey7r(tey7r),
        .tey7i(tey7i),
        .clk(clk),
        .start(start),
        .rdy(rdy));

    integer TX_FILE = 0;
    integer TX_ERROR = 0;
    
    initial begin    // Annotation process for clock clk
        #0;
        ANNOTATE_tey0r;
        ANNOTATE_tey0i;
        ANNOTATE_tey1r;
        ANNOTATE_tey1i;
        ANNOTATE_tey2r;
        ANNOTATE_tey2i;
        ANNOTATE_tey3r;
        ANNOTATE_tey3i;
        ANNOTATE_tey4r;
        ANNOTATE_tey4i;
        ANNOTATE_tey5r;
        ANNOTATE_tey5i;
        ANNOTATE_tey6r;
        ANNOTATE_tey6i;
        ANNOTATE_tey7r;
        ANNOTATE_tey7i;
        ANNOTATE_rdy;
        #OFFSET;
        forever begin
            #115;
            ANNOTATE_tey0r;
            ANNOTATE_tey0i;
            ANNOTATE_tey1r;
            ANNOTATE_tey1i;
            ANNOTATE_tey2r;
            ANNOTATE_tey2i;
            ANNOTATE_tey3r;
            ANNOTATE_tey3i;
            ANNOTATE_tey4r;
            ANNOTATE_tey4i;
            ANNOTATE_tey5r;
            ANNOTATE_tey5i;
            ANNOTATE_tey6r;
            ANNOTATE_tey6i;
            ANNOTATE_tey7r;
            ANNOTATE_tey7i;
            ANNOTATE_rdy;
            #85;
        end
    end

    initial begin  // Open the annotations file...
        TX_FILE = $fopen("F:\\myfpga\\xilinx\\wopt\\eexywave.ano");
        #10200 // Final time:  10200 ns
        $display("Success! Annotation Simulation Complete.");
        $fdisplay(TX_FILE, "Total[%d]", TX_ERROR);
        $fclose(TX_FILE);
        $finish;
    end

    initial begin
        // -------------  Current Time:  85ns
        #85;
        eei = 16'b0000000000000101;
        yx0i = 16'b0000000001000001;
        yx3r = 16'b0000000000001000;
        yx6i = 16'b0000000000000110;
        // -------------------------------------
        // -------------  Current Time:  285ns
        #200;
        eer = 16'b0000000000111110;
        eei = 16'b0011101010011000;
        yx0r = 16'b0000000000001000;
        yx1r = 16'b0000000000001001;
        yx1i = 16'b0000000000111100;
        yx2r = 16'b0010011100010000;
        yx2i = 16'b0000000000000101;
        yx3i = 16'b0000000000000100;
        yx4r = 16'b0000000000001000;
        yx4i = 16'b0000000000000010;
        yx5r = 16'b0000000000000001;
        yx5i = 16'b0001011101110000;
        yx6r = 16'b0111010100110000;
        yx6i = 16'b0000011111010000;
        yx7r = 16'b0000000000000111;
        yx7i = 16'b0000000000001001;
        // -------------------------------------
        // -------------  Current Time:  485ns
        #200;
        start = 1'b1;
        eer = 16'b0010001100101000;
        // -------------------------------------
    end

    task ANNOTATE_tey0r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey0r,%b]", $time, tey0r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey0i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey0i,%b]", $time, tey0i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey1r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey1r,%b]", $time, tey1r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey1i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey1i,%b]", $time, tey1i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey2r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey2r,%b]", $time, tey2r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey2i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey2i,%b]", $time, tey2i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey3r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey3r,%b]", $time, tey3r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey3i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey3i,%b]", $time, tey3i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey4r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey4r,%b]", $time, tey4r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey4i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey4i,%b]", $time, tey4i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey5r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey5r,%b]", $time, tey5r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey5i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey5i,%b]", $time, tey5i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey6r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey6r,%b]", $time, tey6r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey6i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey6i,%b]", $time, tey6i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey7r;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey7r,%b]", $time, tey7r);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_tey7i;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,tey7i,%b]", $time, tey7i);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

    task ANNOTATE_rdy;
        #0 begin
            $fdisplay(TX_FILE, "Annotate[%d,rdy,%b]", $time, rdy);
            $fflush(TX_FILE);
            TX_ERROR = TX_ERROR + 1;
        end
    endtask

endmodule