?? medical.tan.qmsg
字號:
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" { } { { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 34 -1 0 } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "clk2 " "Info: Assuming node \"clk2\" is an undefined clock" { } { { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 35 -1 0 } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk2" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "clk register register cntt\[5\]~reg0 cntt\[3\]~reg0 500.0 MHz Internal " "Info: Clock \"clk\" Internal fmax is restricted to 500.0 MHz between source register \"cntt\[5\]~reg0\" and destination register \"cntt\[3\]~reg0\"" { { "Info" "ITDB_CLOCK_RATE" "clock 2.0 ns " "Info: fmax restricted to clock pin edge rate 2.0 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.307 ns + Longest register register " "Info: + Longest register to register delay is 1.307 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cntt\[5\]~reg0 1 REG LCFF_X1_Y18_N29 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X1_Y18_N29; Fanout = 4; REG Node = 'cntt\[5\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { cntt[5]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.412 ns) + CELL(0.272 ns) 0.684 ns Equal1~41 2 COMB LCCOMB_X1_Y18_N24 2 " "Info: 2: + IC(0.412 ns) + CELL(0.272 ns) = 0.684 ns; Loc. = LCCOMB_X1_Y18_N24; Fanout = 2; COMB Node = 'Equal1~41'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.684 ns" { cntt[5]~reg0 Equal1~41 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 171 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.240 ns) + CELL(0.228 ns) 1.152 ns cntt~108 3 COMB LCCOMB_X1_Y18_N30 1 " "Info: 3: + IC(0.240 ns) + CELL(0.228 ns) = 1.152 ns; Loc. = LCCOMB_X1_Y18_N30; Fanout = 1; COMB Node = 'cntt~108'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.468 ns" { Equal1~41 cntt~108 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 40 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.155 ns) 1.307 ns cntt\[3\]~reg0 4 REG LCFF_X1_Y18_N31 5 " "Info: 4: + IC(0.000 ns) + CELL(0.155 ns) = 1.307 ns; Loc. = LCFF_X1_Y18_N31; Fanout = 5; REG Node = 'cntt\[3\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.155 ns" { cntt~108 cntt[3]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.655 ns ( 50.11 % ) " "Info: Total cell delay = 0.655 ns ( 50.11 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.652 ns ( 49.89 % ) " "Info: Total interconnect delay = 0.652 ns ( 49.89 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.307 ns" { cntt[5]~reg0 Equal1~41 cntt~108 cntt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "1.307 ns" { cntt[5]~reg0 {} Equal1~41 {} cntt~108 {} cntt[3]~reg0 {} } { 0.000ns 0.412ns 0.240ns 0.000ns } { 0.000ns 0.272ns 0.228ns 0.155ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.458 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.458 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.854 ns) 0.854 ns clk 1 CLK PIN_N20 1 " "Info: 1: + IC(0.000 ns) + CELL(0.854 ns) = 0.854 ns; Loc. = PIN_N20; Fanout = 1; CLK Node = 'clk'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 34 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.343 ns) + CELL(0.000 ns) 1.197 ns clk~clkctrl 2 COMB CLKCTRL_G3 40 " "Info: 2: + IC(0.343 ns) + CELL(0.000 ns) = 1.197 ns; Loc. = CLKCTRL_G3; Fanout = 40; COMB Node = 'clk~clkctrl'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.343 ns" { clk clk~clkctrl } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 34 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.643 ns) + CELL(0.618 ns) 2.458 ns cntt\[3\]~reg0 3 REG LCFF_X1_Y18_N31 5 " "Info: 3: + IC(0.643 ns) + CELL(0.618 ns) = 2.458 ns; Loc. = LCFF_X1_Y18_N31; Fanout = 5; REG Node = 'cntt\[3\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.261 ns" { clk~clkctrl cntt[3]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.472 ns ( 59.89 % ) " "Info: Total cell delay = 1.472 ns ( 59.89 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.986 ns ( 40.11 % ) " "Info: Total interconnect delay = 0.986 ns ( 40.11 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.458 ns" { clk clk~clkctrl cntt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.458 ns" { clk {} clk~combout {} clk~clkctrl {} cntt[3]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.643ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.458 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.458 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.854 ns) 0.854 ns clk 1 CLK PIN_N20 1 " "Info: 1: + IC(0.000 ns) + CELL(0.854 ns) = 0.854 ns; Loc. = PIN_N20; Fanout = 1; CLK Node = 'clk'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 34 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.343 ns) + CELL(0.000 ns) 1.197 ns clk~clkctrl 2 COMB CLKCTRL_G3 40 " "Info: 2: + IC(0.343 ns) + CELL(0.000 ns) = 1.197 ns; Loc. = CLKCTRL_G3; Fanout = 40; COMB Node = 'clk~clkctrl'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.343 ns" { clk clk~clkctrl } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 34 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.643 ns) + CELL(0.618 ns) 2.458 ns cntt\[5\]~reg0 3 REG LCFF_X1_Y18_N29 4 " "Info: 3: + IC(0.643 ns) + CELL(0.618 ns) = 2.458 ns; Loc. = LCFF_X1_Y18_N29; Fanout = 4; REG Node = 'cntt\[5\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.261 ns" { clk~clkctrl cntt[5]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.472 ns ( 59.89 % ) " "Info: Total cell delay = 1.472 ns ( 59.89 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.986 ns ( 40.11 % ) " "Info: Total interconnect delay = 0.986 ns ( 40.11 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.458 ns" { clk clk~clkctrl cntt[5]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.458 ns" { clk {} clk~combout {} clk~clkctrl {} cntt[5]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.643ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.458 ns" { clk clk~clkctrl cntt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.458 ns" { clk {} clk~combout {} clk~clkctrl {} cntt[3]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.643ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.458 ns" { clk clk~clkctrl cntt[5]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.458 ns" { clk {} clk~combout {} clk~clkctrl {} cntt[5]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.643ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.094 ns + " "Info: + Micro clock to output delay of source is 0.094 ns" { } { { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.090 ns + " "Info: + Micro setup delay of destination is 0.090 ns" { } { { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.307 ns" { cntt[5]~reg0 Equal1~41 cntt~108 cntt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "1.307 ns" { cntt[5]~reg0 {} Equal1~41 {} cntt~108 {} cntt[3]~reg0 {} } { 0.000ns 0.412ns 0.240ns 0.000ns } { 0.000ns 0.272ns 0.228ns 0.155ns } "" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.458 ns" { clk clk~clkctrl cntt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.458 ns" { clk {} clk~combout {} clk~clkctrl {} cntt[3]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.643ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.458 ns" { clk clk~clkctrl cntt[5]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.458 ns" { clk {} clk~combout {} clk~clkctrl {} cntt[5]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.643ns } { 0.000ns 0.854ns 0.000ns 0.618ns } "" } } } 0 0 "fmax restricted to %1!s! pin edge rate %2!s!. Expand message to see actual delay path." 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { cntt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { cntt[3]~reg0 {} } { } { } "" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 175 0 0 } } } 0 0 "Clock \"%1!s!\" %7!s! fmax is restricted to %6!s! between source %2!s! \"%4!s!\" and destination %3!s! \"%5!s!\"" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "clk2 register register cnt\[3\]~reg0 cnt\[2\]~reg0 500.0 MHz Internal " "Info: Clock \"clk2\" Internal fmax is restricted to 500.0 MHz between source register \"cnt\[3\]~reg0\" and destination register \"cnt\[2\]~reg0\"" { { "Info" "ITDB_CLOCK_RATE" "clock 2.0 ns " "Info: fmax restricted to clock pin edge rate 2.0 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.306 ns + Longest register register " "Info: + Longest register to register delay is 1.306 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cnt\[3\]~reg0 1 REG LCFF_X38_Y19_N3 15 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X38_Y19_N3; Fanout = 15; REG Node = 'cnt\[3\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { cnt[3]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.443 ns) + CELL(0.346 ns) 0.789 ns Add0~94 2 COMB LCCOMB_X38_Y19_N8 6 " "Info: 2: + IC(0.443 ns) + CELL(0.346 ns) = 0.789 ns; Loc. = LCCOMB_X38_Y19_N8; Fanout = 6; COMB Node = 'Add0~94'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.789 ns" { cnt[3]~reg0 Add0~94 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 125 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.309 ns) + CELL(0.053 ns) 1.151 ns cnt\[2\]~234 3 COMB LCCOMB_X38_Y19_N12 1 " "Info: 3: + IC(0.309 ns) + CELL(0.053 ns) = 1.151 ns; Loc. = LCCOMB_X38_Y19_N12; Fanout = 1; COMB Node = 'cnt\[2\]~234'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.362 ns" { Add0~94 cnt[2]~234 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.155 ns) 1.306 ns cnt\[2\]~reg0 4 REG LCFF_X38_Y19_N13 19 " "Info: 4: + IC(0.000 ns) + CELL(0.155 ns) = 1.306 ns; Loc. = LCFF_X38_Y19_N13; Fanout = 19; REG Node = 'cnt\[2\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.155 ns" { cnt[2]~234 cnt[2]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.554 ns ( 42.42 % ) " "Info: Total cell delay = 0.554 ns ( 42.42 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.752 ns ( 57.58 % ) " "Info: Total interconnect delay = 0.752 ns ( 57.58 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.306 ns" { cnt[3]~reg0 Add0~94 cnt[2]~234 cnt[2]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "1.306 ns" { cnt[3]~reg0 {} Add0~94 {} cnt[2]~234 {} cnt[2]~reg0 {} } { 0.000ns 0.443ns 0.309ns 0.000ns } { 0.000ns 0.346ns 0.053ns 0.155ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk2 destination 2.495 ns + Shortest register " "Info: + Shortest clock path from clock \"clk2\" to destination register is 2.495 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.864 ns) 0.864 ns clk2 1 CLK PIN_M21 1 " "Info: 1: + IC(0.000 ns) + CELL(0.864 ns) = 0.864 ns; Loc. = PIN_M21; Fanout = 1; CLK Node = 'clk2'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk2 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.343 ns) + CELL(0.000 ns) 1.207 ns clk2~clkctrl 2 COMB CLKCTRL_G1 13 " "Info: 2: + IC(0.343 ns) + CELL(0.000 ns) = 1.207 ns; Loc. = CLKCTRL_G1; Fanout = 13; COMB Node = 'clk2~clkctrl'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.343 ns" { clk2 clk2~clkctrl } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.670 ns) + CELL(0.618 ns) 2.495 ns cnt\[2\]~reg0 3 REG LCFF_X38_Y19_N13 19 " "Info: 3: + IC(0.670 ns) + CELL(0.618 ns) = 2.495 ns; Loc. = LCFF_X38_Y19_N13; Fanout = 19; REG Node = 'cnt\[2\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.288 ns" { clk2~clkctrl cnt[2]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.482 ns ( 59.40 % ) " "Info: Total cell delay = 1.482 ns ( 59.40 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.013 ns ( 40.60 % ) " "Info: Total interconnect delay = 1.013 ns ( 40.60 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.495 ns" { clk2 clk2~clkctrl cnt[2]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.495 ns" { clk2 {} clk2~combout {} clk2~clkctrl {} cnt[2]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.670ns } { 0.000ns 0.864ns 0.000ns 0.618ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk2 source 2.495 ns - Longest register " "Info: - Longest clock path from clock \"clk2\" to source register is 2.495 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.864 ns) 0.864 ns clk2 1 CLK PIN_M21 1 " "Info: 1: + IC(0.000 ns) + CELL(0.864 ns) = 0.864 ns; Loc. = PIN_M21; Fanout = 1; CLK Node = 'clk2'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk2 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.343 ns) + CELL(0.000 ns) 1.207 ns clk2~clkctrl 2 COMB CLKCTRL_G1 13 " "Info: 2: + IC(0.343 ns) + CELL(0.000 ns) = 1.207 ns; Loc. = CLKCTRL_G1; Fanout = 13; COMB Node = 'clk2~clkctrl'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "0.343 ns" { clk2 clk2~clkctrl } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.670 ns) + CELL(0.618 ns) 2.495 ns cnt\[3\]~reg0 3 REG LCFF_X38_Y19_N3 15 " "Info: 3: + IC(0.670 ns) + CELL(0.618 ns) = 2.495 ns; Loc. = LCFF_X38_Y19_N3; Fanout = 15; REG Node = 'cnt\[3\]~reg0'" { } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.288 ns" { clk2~clkctrl cnt[3]~reg0 } "NODE_NAME" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.482 ns ( 59.40 % ) " "Info: Total cell delay = 1.482 ns ( 59.40 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.013 ns ( 40.60 % ) " "Info: Total interconnect delay = 1.013 ns ( 40.60 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.495 ns" { clk2 clk2~clkctrl cnt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.495 ns" { clk2 {} clk2~combout {} clk2~clkctrl {} cnt[3]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.670ns } { 0.000ns 0.864ns 0.000ns 0.618ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.495 ns" { clk2 clk2~clkctrl cnt[2]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.495 ns" { clk2 {} clk2~combout {} clk2~clkctrl {} cnt[2]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.670ns } { 0.000ns 0.864ns 0.000ns 0.618ns } "" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.495 ns" { clk2 clk2~clkctrl cnt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.495 ns" { clk2 {} clk2~combout {} clk2~clkctrl {} cnt[3]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.670ns } { 0.000ns 0.864ns 0.000ns 0.618ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.094 ns + " "Info: + Micro clock to output delay of source is 0.094 ns" { } { { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.090 ns + " "Info: + Micro setup delay of destination is 0.090 ns" { } { { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "1.306 ns" { cnt[3]~reg0 Add0~94 cnt[2]~234 cnt[2]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "1.306 ns" { cnt[3]~reg0 {} Add0~94 {} cnt[2]~234 {} cnt[2]~reg0 {} } { 0.000ns 0.443ns 0.309ns 0.000ns } { 0.000ns 0.346ns 0.053ns 0.155ns } "" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.495 ns" { clk2 clk2~clkctrl cnt[2]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.495 ns" { clk2 {} clk2~combout {} clk2~clkctrl {} cnt[2]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.670ns } { 0.000ns 0.864ns 0.000ns 0.618ns } "" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "2.495 ns" { clk2 clk2~clkctrl cnt[3]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "2.495 ns" { clk2 {} clk2~combout {} clk2~clkctrl {} cnt[3]~reg0 {} } { 0.000ns 0.000ns 0.343ns 0.670ns } { 0.000ns 0.864ns 0.000ns 0.618ns } "" } } } 0 0 "fmax restricted to %1!s! pin edge rate %2!s!. Expand message to see actual delay path." 0 0 "" 0} } { { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/soft_install/altera/quartusii7.2/install/quartus/bin/TimingClosureFloorplan.fld" "" "" { cnt[2]~reg0 } "NODE_NAME" } } { "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/soft_install/altera/quartusii7.2/install/quartus/bin/Technology_Viewer.qrui" "" { cnt[2]~reg0 {} } { } { } "" } } { "medical.v" "" { Text "D:/TRY/medical----/FPGA/medical.v" 133 0 0 } } } 0 0 "Clock \"%1!s!\" %7!s! fmax is restricted to %6!s! between source %2!s! \"%4!s!\" and destination %3!s! \"%5!s!\"" 0 0 "" 0}
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