/********************************************************************/
/*  Copyright 2004 by SEED Incorporated.							*/
/*  All rights reserved. Property of SEED Incorporated.				*/
/*  Restricted rights to use, duplicate or disclose this code are	*/
/*  granted through contract.									    */
/*  															    */
/********************************************************************/
#include <csl.h>
#include <csl_emifa.h>
#include <csl_i2c.h>
#include <csl_gpio.h>
#include <csl_irq.h>
#include <csl_chip.h>
#include "iic.h"
#include "vportcap.h"
#include "vportdis.h"
#include "sa7121h.h"

/*SEEDDM642的emifa的設(shè)置結(jié)構(gòu)*/
EMIFA_Config Seeddm642ConfigA ={
	   0x00052078,/*gblctl EMIFA(B)global control register value */
	   			  /*將CLK6、4、1使能；將MRMODE置1；使能EK2EN,EK2RATE*/
	   0xffffffd3,/*cectl0 CE0 space control register value*/
	   			  /*將CE0空間設(shè)為SDRAM*/
	   0x73a28e01,/*cectl1 CE1 space control register value*/
	   			  /*Read hold: 1 clock;
	   			    MTYPE : 0000,選擇8位的異步接口
	   			    Read strobe ：001110；14個(gè)clock寬度
	   			    TA：2 clock; Read setup 2 clock;
	   			    Write hold :2 clock; Write strobe: 14 clock
	   			    Write setup :7 clock
	   			    --					 ---------------
	   			  	  \		 14c		/1c
	   			 	   \----------------/ */
	   0x22a28a22, /*cectl2 CE2 space control register value*/
       0x22a28a42, /*cectl3 CE3 space control register value*/
	   0x57115000, /*sdctl SDRAM control register value*/
	   0x0000081b, /*sdtim SDRAM timing register value*/
	   0x001faf4d, /*sdext SDRAM extension register value*/
	   0x00000002, /*cesec0 CE0 space secondary control register value*/
	   0x00000002, /*cesec1 CE1 space secondary control register value*/
	   0x00000002, /*cesec2 CE2 space secondary control register value*/
	   0x00000073 /*cesec3 CE3 space secondary control register value*/	
};

/*SEEDDM642的IIC的設(shè)置結(jié)構(gòu)*/
I2C_Config SEEDDM642IIC_Config = {
    0,  /* master mode,  i2coar;采用主模式   */
    0,  /* no interrupt, i2cimr;只寫，不讀，采用無中斷方式*/
    (20-5), /* scl low time, i2cclkl;  */
    (20-5), /* scl high time,i2cclkh;  */
    1,  /* configure later, i2ccnt;*/
    0,  /* configure later, i2csar;*/
    0x4ea0, /* master tx mode,     */
            /* i2c runs free,      */
            /* 8-bit data + NACK   */
            /* no repeat mode      */
    (75-1), /* 4MHz clock, i2cpsc  */
};

CHIP_Config SEEDDM642percfg = {
	CHIP_VP2+\
	CHIP_VP1+\
	CHIP_VP0+\
	CHIP_I2C
};

I2C_Handle hSeeddm642i2c;
int portNumber;
extern SA7121H_ConfParams sa7121hPAL[45];
extern SA7121H_ConfParams sa7121hNTSC[45];
Uint8 vFromat = 0;
Uint8 temp = 0;
Uint8 misc_ctrl = 0x6D;
Uint8 output_format = 0x47;
// 地址為0 for cvbs port1,選擇復(fù)合信號(hào)做為輸入
Uint8 input_sel = 0x00;
/*地址為0xf，將Pin27設(shè)置成為CAPEN功能*/	
Uint8 pin_cfg = 0x02;
/*地址為1B*/
Uint8 chro_ctrl_2 = 0x14;
/*圖像句柄的聲明*/
VP_Handle vpHchannel0;
VP_Handle vpHchannel1;
VP_Handle vpHchannel2;
extern far void vectors();

/*此程序可將四個(gè)采集口的數(shù)據(jù)經(jīng)過Video Port0送出*/
void main()
{
	Uint8 addrI2C;
/*-------------------------------------------------------*/
/* perform all initializations                           */
/*-------------------------------------------------------*/
	/*Initialise CSL，初始化CSL庫*/
	CSL_init();
	CHIP_config(&SEEDDM642percfg);
/*----------------------------------------------------------*/
	/*EMIFA的初始化，將CE0設(shè)為SDRAM空間，CE1設(shè)為異步空間
	 注，DM642支持的是EMIFA，而非EMIF*/
	EMIFA_config(&Seeddm642ConfigA);
/*----------------------------------------------------------*/
	/*中斷向量表的初始化*/
	//Point to the IRQ vector table
    IRQ_setVecs(vectors);
    IRQ_nmiEnable();
    IRQ_globalEnable();
    IRQ_map(IRQ_EVT_VINT0, 11);
    IRQ_map(IRQ_EVT_VINT1, 12);
    IRQ_reset(IRQ_EVT_VINT0);
    IRQ_reset(IRQ_EVT_VINT1);	
/*----------------------------------------------------------*/	
	/*進(jìn)行IIC的初始化*/
	hSeeddm642i2c = I2C_open(I2C_PORT0,I2C_OPEN_RESET);
	I2C_config(hSeeddm642i2c,&SEEDDM642IIC_Config);
/*----------------------------------------------------------*/
	/*進(jìn)行TVP5150pbs的初始化*/
	/*選擇TVP5150，設(shè)置第三通路*/
	GPIO_RSET(GPGC,0x0);/*將GPIO0不做為GPINT使用*/
	GPIO_RSET(GPDIR,0x1);/*將GPIO0做為輸出*/
	GPIO_RSET(GPVAL,0x0);/*GPIO0輸出為高，選擇IIC1總線，配置
						   第二路，即為U21*/
	addrI2C = 0xB8 >>1;
    _IIC_write(hSeeddm642i2c, addrI2C,0x00, input_sel);
//    _IIC_write(hSeeddm642i2c, addrI2C,0x04, temp);
    _IIC_write(hSeeddm642i2c, addrI2C,0x03, misc_ctrl);
    _IIC_write(hSeeddm642i2c, addrI2C,0x0D, output_format);
    _IIC_write(hSeeddm642i2c, addrI2C,0x0F, pin_cfg);
    _IIC_write(hSeeddm642i2c, addrI2C,0x1B, chro_ctrl_2);
    /*回讀當(dāng)前攝像設(shè)備的格式*/
    _IIC_read(hSeeddm642i2c, addrI2C,0x8c, vFromat);
    vFromat = vFromat & 0xf;	  
/*----------------------------------------------------------*/	
	/*進(jìn)行SAA7121H的初始化*/
//	GPIO_RSET(GPVAL,0x0);/*GPIO0輸出為低，選擇IIC1總線，配置圖像輸出*/						  
//	addrI2C = 0xB8 >>1;
	/*將第0路的視頻輸入口的數(shù)據(jù)口設(shè)為高阻狀態(tài)*/
//	_IIC_write(hSeeddm642i2c, addrI2C,0x03, 0x);
	/*視頻輸入口0選擇模式為PAL或是NTSC，為圖像輸出提供時(shí)序信號(hào)*/
	/*配置SAA7121H*/
//	addrI2C = 0x88 >>1;					      
//	for(i = 0;i<43 ;i++)
//	{
//		_IIC_write(hSeeddm642i2c, addrI2C,sa7121hNTSC[i].regsubaddr, (sa7121hNTSC[i].regvule));
//	}	
/*----------------------------------------------------------*/
	/*初始化Video Port*/
	/*將Vedio Port1設(shè)為采集輸入*/
	portNumber = 0;
	vpHchannel1 = bt656_8bit_ncfc(portNumber);
	bt656_capture_start(vpHchannel1);
	for(;;)
	{}
/*----------------------------------------------------------*/
	/*采集與回放*/	
}