# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ffti_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EP1C3T144C8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY ffti
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:48:24  SEPTEMBER 03, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 7.1
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (VHDL)"
set_global_assignment -name EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION ON -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_16 -to clk
set_location_assignment PIN_68 -to p0[7]
set_location_assignment PIN_69 -to p0[6]
set_location_assignment PIN_70 -to p0[5]
set_location_assignment PIN_71 -to p0[4]
set_location_assignment PIN_72 -to p0[3]
set_location_assignment PIN_73 -to p0[2]
set_location_assignment PIN_74 -to p0[1]
set_location_assignment PIN_75 -to p0[0]
set_location_assignment PIN_76 -to rd
set_location_assignment PIN_77 -to wr
set_location_assignment PIN_78 -to ale
set_location_assignment PIN_79 -to p2[4]
set_location_assignment PIN_82 -to p2[3]
set_location_assignment PIN_83 -to p2[2]
set_location_assignment PIN_84 -to p2[1]
set_location_assignment PIN_85 -to p2[0]
set_location_assignment PIN_94 -to cs
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE Waveform1.vwf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name VHDL_FILE ff.vhd
set_global_assignment -name VHDL_FILE ramdata.vhd
set_global_assignment -name VHDL_FILE ramwave.vhd
set_global_assignment -name VHDL_FILE TRANS.vhd
set_global_assignment -name VHDL_FILE address.vhd
set_global_assignment -name VHDL_FILE blockdram.vhd
set_global_assignment -name VHDL_FILE cfft.vhd
set_global_assignment -name VHDL_FILE cfft1024X12.vhd
set_global_assignment -name VHDL_FILE cfft4.vhd
set_global_assignment -name VHDL_FILE div4limit.vhd
set_global_assignment -name VHDL_FILE mulfactor.vhd
set_global_assignment -name VHDL_FILE p2r_cordic.vhd
set_global_assignment -name VHDL_FILE p2r_CordicPipe.vhd
set_global_assignment -name VHDL_FILE ram.vhd
set_global_assignment -name VHDL_FILE rofactor.vhd
set_global_assignment -name VHDL_FILE sc_corproc.vhd
set_global_assignment -name VHDL_FILE MCUBUS.vhd
set_global_assignment -name BDF_FILE ffti.bdf
set_global_assignment -name VHDL_FILE GEN.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE GEN.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE BUS.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE TE.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE ffti.vwf
set_global_assignment -name BDF_FILE Block1.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform1.vwf