?? i2c_slave_model.ndo
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## NOTE: Do not edit this file.
## Auto generated by Project Navigator for Verilog Post-Translate Simulation
##
vlib work
## Compile Post-Translate Model for Module
vlog "C:/Program Files/Xilinx/verilog/src/glbl.v"
vlog _translate.v
vlog i2c_slave_model.v
vsim -t 1ps -L simprims_ver -lib work i2c_slave_model glbl
do i2c_slave_model.udo
view wave
add wave *
view structure
view signals
run 1000ns
## End
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