|clock
clk => clk~0.IN2
rst => rst~0.IN4
out[0] <= decoder:decoder1.port1
out[1] <= decoder:decoder1.port1
out[2] <= decoder:decoder1.port1
out[3] <= decoder:decoder1.port1
out[4] <= decoder:decoder1.port1
out[5] <= decoder:decoder1.port1
out[6] <= decoder:decoder1.port1
out[7] <= decoder:decoder1.port1
sel[0] <= chooser:chooser1.port6
sel[1] <= chooser:chooser1.port6
sel[2] <= chooser:chooser1.port6


|clock|counter60:counter60_1
clk => out[7]~reg0.CLK
clk => out[6]~reg0.CLK
clk => out[5]~reg0.CLK
clk => out[4]~reg0.CLK
clk => out[3]~reg0.CLK
clk => out[2]~reg0.CLK
clk => out[1]~reg0.CLK
clk => out[0]~reg0.CLK
clk => carry~reg0.CLK
rst => out[7]~reg0.ACLR
rst => out[6]~reg0.ACLR
rst => out[5]~reg0.ACLR
rst => out[4]~reg0.ACLR
rst => out[3]~reg0.ACLR
rst => out[2]~reg0.ACLR
rst => out[1]~reg0.ACLR
rst => out[0]~reg0.ACLR
rst => carry~reg0.ACLR
carry <= carry~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[0] <= out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[1] <= out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[2] <= out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[3] <= out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[4] <= out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[5] <= out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[6] <= out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[7] <= out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|clock|counter60:counter60_2
clk => out[7]~reg0.CLK
clk => out[6]~reg0.CLK
clk => out[5]~reg0.CLK
clk => out[4]~reg0.CLK
clk => out[3]~reg0.CLK
clk => out[2]~reg0.CLK
clk => out[1]~reg0.CLK
clk => out[0]~reg0.CLK
clk => carry~reg0.CLK
rst => out[7]~reg0.ACLR
rst => out[6]~reg0.ACLR
rst => out[5]~reg0.ACLR
rst => out[4]~reg0.ACLR
rst => out[3]~reg0.ACLR
rst => out[2]~reg0.ACLR
rst => out[1]~reg0.ACLR
rst => out[0]~reg0.ACLR
rst => carry~reg0.ACLR
carry <= carry~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[0] <= out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[1] <= out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[2] <= out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[3] <= out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[4] <= out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[5] <= out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[6] <= out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[7] <= out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|clock|counter24:counter24_1
clk => out[6]~reg0.CLK
clk => out[5]~reg0.CLK
clk => out[4]~reg0.CLK
clk => out[3]~reg0.CLK
clk => out[2]~reg0.CLK
clk => out[1]~reg0.CLK
clk => out[0]~reg0.CLK
clk => out[7]~reg0.CLK
rst => out[6]~reg0.ACLR
rst => out[5]~reg0.ACLR
rst => out[4]~reg0.ACLR
rst => out[3]~reg0.ACLR
rst => out[2]~reg0.ACLR
rst => out[1]~reg0.ACLR
rst => out[0]~reg0.ACLR
rst => out[7]~reg0.ACLR
out[0] <= out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[1] <= out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[2] <= out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[3] <= out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[4] <= out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[5] <= out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[6] <= out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[7] <= out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|clock|chooser:chooser1
clk => i[1].CLK
clk => i[0].CLK
clk => sel[2]~reg0.CLK
clk => sel[1]~reg0.CLK
clk => sel[0]~reg0.CLK
clk => out[3]~reg0.CLK
clk => out[2]~reg0.CLK
clk => out[1]~reg0.CLK
clk => out[0]~reg0.CLK
clk => i[2].CLK
rst => i[1].ACLR
rst => i[0].ACLR
rst => i[2].ACLR
rst => sel[2]~reg0.ENA
rst => sel[1]~reg0.ENA
rst => sel[0]~reg0.ENA
rst => out[3]~reg0.ENA
rst => out[2]~reg0.ENA
rst => out[1]~reg0.ENA
rst => out[0]~reg0.ENA
sec[0] => Select~3.IN2
sec[1] => Select~2.IN2
sec[2] => Select~1.IN2
sec[3] => Select~0.IN2
sec[4] => Select~3.IN1
sec[5] => Select~2.IN1
sec[6] => Select~1.IN1
sec[7] => Select~0.IN1
min[0] => Select~3.IN4
min[1] => Select~2.IN4
min[2] => Select~1.IN4
min[3] => Select~0.IN4
min[4] => Select~3.IN3
min[5] => Select~2.IN3
min[6] => Select~1.IN3
min[7] => Select~0.IN3
hour[0] => Select~3.IN6
hour[1] => Select~2.IN6
hour[2] => Select~1.IN6
hour[3] => Select~0.IN6
hour[4] => Select~3.IN5
hour[5] => Select~2.IN5
hour[6] => Select~1.IN5
hour[7] => Select~0.IN5
out[0] <= out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[1] <= out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[2] <= out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out[3] <= out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
sel[0] <= sel[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
sel[1] <= sel[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
sel[2] <= sel[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|clock|decoder:decoder1
in[0] => Decoder~0.IN3
in[1] => Decoder~0.IN2
in[2] => Decoder~0.IN1
in[3] => Decoder~0.IN0
out[0] <= <GND>
out[1] <= out~1.DB_MAX_OUTPUT_PORT_TYPE
out[2] <= reduce_or~3.DB_MAX_OUTPUT_PORT_TYPE
out[3] <= reduce_or~2.DB_MAX_OUTPUT_PORT_TYPE
out[4] <= out~0.DB_MAX_OUTPUT_PORT_TYPE
out[5] <= reduce_or~1.DB_MAX_OUTPUT_PORT_TYPE
out[6] <= reduce_or~0.DB_MAX_OUTPUT_PORT_TYPE
out[7] <= out~0.DB_MAX_OUTPUT_PORT_TYPE