;*******************************************************************************
;
;        SN8P1917 Digital and Analog Example Test code
;	
;						Date : 2005/09/07
;						Bryant
;						ij_chen@sonix.com.
;					
;*******************************************************************************
;*******************************************************************************
;Version V1.0: 2005/09/07 First Initial
;This is a short code to demo how to coding the SN8P1917 chip
;This code is the same as datasheet presented.
;*******************************************************************************



ICE_Mode	EQU	1		; 1 for ICE , 0 for real chip
;ICE_Mode	EQU	0		; 1 for ICE , 0 for real chip
CHIP		SN8P1917
//{{SONIX_CODE_OPTION
	.Code_Option	IHRC_CAL_H	H7
	.Code_Option	IHRC_CAL_LH	111
	.Code_Option	IHRC_CAL_LL	111
	.Code_Option	High_Clk	4M_X'tal
	.Code_Option	Security	Disable
	.Code_Option	Int_16K_RC	By_CPUM
	.Code_Option	Low_Power	Disable
	.Code_Option	Watch_Dog	Disable



//}}SONIX_CODE_OPTION
.NOLIST
		INCLUDESTD	MACRO1.H
		INCLUDESTD	MACRO2.H
		INCLUDESTD	MACRO3.H
		INCLUDE		1917Ev.h	; Included 1917EV.h for ICE linking EV-board

.LIST

.DATA
; ***********************
; *** SYSTEM CONSTANT ***
; ***********************
;000H ~ 07FH (GENERAL USE RAM)
TEMP0		EQU	000H			;Working Registers
TEMP1		EQU	001H
TEMP2		EQU	002H
TEMP3		EQU	003H
TEMP4		EQU	004H
;
ADCBUF_H	EQU	005H			;ADC Data buffer High Byte
ADCBUF_L	EQU	006H			;ADC Data buffer Low Byte


;080H ~ 0FFH (SYSTEM REGISTOR)
	
.CODE
		ORG	000H			;RESET VECTOR
		JMP	RESET
		ORG	008H
		NOP				;INTERRUPT VECTOR

		ORG	010H			;PROGRAM START ADDRESS
RESET:						;Initial process Clear RAM
		CLR	Y
		MOV	A,#07FH			;CLEAR RAM 000H ~ 07FH
		MOV	Z,A
CLRRAM_B0:	CLR	@YZ
		DECMS	Z
		JMP	CLRRAM_B0
		CLR	@YZ

		MOV	A,#0FH			;CLEAR RAM F00H ~ F0BH (LCD RAM)
		B0MOV	Y,A
		MOV	A,#0BH			
		B0MOV	Z,A
CLRRAM_BF:	CLR	@YZ
		DECMS	Z
		JMP	CLRRAM_BF
		CLR	@YZ
		
		CLR	Y
		MOV	a,#10H
		MOV	Z,A		

		MOV	A,#07FH			;INIT. STACK POINTER BUFFER
		MOV	STKP,A
; RUN 1909EV.H MACRO

		@set_lcdm1	0x0B		;Enable LCD and Set LCD clock=Internal RC/32
		nop
		INIT_1917EV			;Initial EV1917 Marco First before using X-command

@CPREG_Init:			
		XB0BSET	FBGRENB			;Enable Band Gap Reference voltage.
			
		MOV	A,#00001111b	
		XB0MOV	CPCKS,A			; Set CPCKS as slowest clock to void VDD dropping.
			
		MOV	A,#00100100B
		XB0MOV	CPM,A			; Set AVE+=3.0V ,CP as Auto mode and Disable AVDDR, AVE+, ACM voltage and before enable Charge pump
			
@CP_Enable:			
		XB0BSET	FCPRENB			; Enable Charge-Pump 
		CALL	@Wait_30ms		; Delay 30ms for Charge-Pump Stabilize
		MOV	A, #0000110b	
		XB0MOV	CPCKS, A		; Set CPCKS as 4K for 10mA current loading.
			
@ACM_Enable:			
		XB0BSET	FACMENB			; Enable ACM Voltage=1.2v
		CALL	@Wait_5ms		; Delay 5ms for ACM Voltage Stabilize
			
@AVDDR_Enable:			
		XB0BSET	FAVDDRENB		; Enable AVDDR Voltage=3.8V
		CALL	@Wait_5ms		; Delay 5ms for AVDDR Voltage Stabilize
			
@AVE_Enable:			
		XB0BSET	FAVENB			; Enable AVE+ Voltage=3.0V/1.5V
		CALL	@Wait_5ms		; Delay 5ms for AVE+ Voltage Stabilize
			
@PGIA_Init:			
		MOV	A, #01010110B	
		XB0MOV	AMPM, A			; Enable Band Gap, Set :FDS="01" and PGIA Gain=200
		MOV	A, #00000011B	
		XB0MOV	AMPCKS, A		; Set AMPCKS = "011" for PGIA working clock = 3.9K @ 4M X'tal
		MOV	A, #00h	
		XB0MOV	AMPCHS, A		; Selected PGIA differential input channel= AI+, AI-

@PGIA_Enable:			
		XB0BSET	FAMPENB			; Enable PGIA function
						; V (X+, X-) Output = V (AI+, AI-) x 200
@ADC_Init:			
		MOV	A, #00011100b	
		XB0MOV	ADCM, A			; Selection ADC Reference voltage = V(1.2, 0.8)
		MOV	A, #0216	
		XB0MOV	ADCKS, A		; Set ADCKS = 216 for ADC working clock = 100K @ 4M X'tal
		MOV	A, #00000000b	
		XB0MOV	DFM, A			; Set ADC as continuous mode and WRS0 = "0" Conversion Rate=25 Hz
@ADC_Enable:			
		XB0BSET	FADCENB			; Enable ADC function
@ADC_Wait:			
		XB0BTS1	FDRDY			; Check ADC output new data or not
		JMP	@ADC_Wait		; Wait for Bit DRDY = 1
@ADC_Read:					; Output ADC conversion word
		XB0BCLR	FDRDY			; Get New ADC data and clear FDRDY.
		XB0MOV	A,ADCDH
		B0MOV	ADCBUF_H,A
		B0MOV	@yz,A			; Save ADC data to RAM 0010~0078
		INCMS	Z
		XB0MOV	A,ADCDL
		B0MOV	ADCBUF_L,A
		B0MOV	@YZ,a
		INCMS	Z
		MOV	A,#0FFH
		MOV	A,#78H
		CMPRS	A,Z
		JMP	@ADC_wait
		JMP	$
;*********************************************************
;/// DELAY CALL
@Wait_30ms:
		MOV	A,#31		;A=#31 for 30MS
		JMP	DELAY
@Wait_0ms:
		MOV	A,#11		;A=#11 for 10MS
		JMP	DELAY
@Wait_5ms:
		MOV	A,#6		;A=#6 for 5MS
		JMP	DELAY

DELAY:
		B0MOV	TEMP3,A			
		MOV	A,#0250
		B0MOV	TEMP2,A
DELAY0:		
		NOP
		DECMS	TEMP0
		JMP	DELAY0
DELAY1:
		DECMS	TEMP3
		JMP	DELAY0
		RET

;/// DELAY 5mS


		INCLUDE			1917EV.ASM
		ENDP