/* @(#)scsireg.h	1.18 98/03/28 Copyright 1987 J. Schilling *//* *	usefull definitions for dealing with CCS SCSI - devices * *	Copyright (c) 1987 J. Schilling *//* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; see the file COPYING.  If not, write to * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */#ifndef	_SCSIREG_H#define	_SCSIREG_H#include <utypes.h>#include <btorder.h>/*  * SCSI status bits. */#define	ST_VU_00	0x01	/* Vendor unique		*/#define	ST_CHK_COND	0x02	/* Check condition		*/#define	ST_COND_MET	0x04	/* Condition met		*/#define	ST_BUSY		0x08	/* Busy				*/#define	ST_IS_SEND	0x10	/* Intermediate status send	*/#define	ST_VU_05	0x20	/* Vendor unique		*/#define	ST_VU_06	0x40	/* Vendor unique		*/#define	ST_RSVD_07	0x80	/* Reserved	 		*//*  * Sense key values for extended sense. */#define SC_NO_SENSE		0x00#define SC_RECOVERABLE_ERROR	0x01#define SC_NOT_READY		0x02#define SC_MEDIUM_ERROR		0x03#define SC_HARDWARE_ERROR	0x04#define SC_ILLEGAL_REQUEST	0x05#define SC_UNIT_ATTENTION	0x06#define SC_WRITE_PROTECT	0x07#define SC_BLANK_CHECK		0x08#define SC_VENDOR_UNIQUE	0x09#define SC_COPY_ABORTED		0x0A#define SC_ABORTED_COMMAND	0x0B#define SC_EQUAL		0x0C#define SC_VOLUME_OVERFLOW	0x0D#define SC_MISCOMPARE		0x0E#define SC_RESERVED		0x0F#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct	scsi_inquiry {	Ucbit	type		: 5;	/*  0 */	Ucbit	qualifier	: 3;	/*  0 */	Ucbit	type_modifier	: 7;	/*  1 */	Ucbit	removable	: 1;	/*  1 */	Ucbit	ansi_version	: 3;	/*  2 */	Ucbit	ecma_version	: 3;	/*  2 */	Ucbit	iso_version	: 2;	/*  2 */	Ucbit	data_format	: 4;	/*  3 */	Ucbit	res3_54		: 2;	/*  3 */	Ucbit	termiop		: 1;	/*  3 */	Ucbit	aenc		: 1;	/*  3 */	Ucbit	add_len		: 8;	/*  4 */	Ucbit	sense_len	: 8;	/*  5 */ /* only Emulex ??? */	Ucbit	res2		: 8;	/*  6 */	Ucbit	softreset	: 1;	/*  7 */	Ucbit	cmdque		: 1;	Ucbit	res7_2		: 1;	Ucbit	linked		: 1;	Ucbit	sync		: 1;	Ucbit	wbus16		: 1;	Ucbit	wbus32		: 1;	Ucbit	reladr		: 1;	/*  7 */	char	vendor_info[8];		/*  8 */	char	prod_ident[16];		/* 16 */	char	prod_revision[4];	/* 32 */#ifdef	comment	char	vendor_uniq[20];	/* 36 */	char	reserved[40];		/* 56 */#endif};					/* 96 */#else					/* Motorola byteorder */struct	scsi_inquiry {	Ucbit	qualifier	: 3;	/*  0 */	Ucbit	type		: 5;	/*  0 */	Ucbit	removable	: 1;	/*  1 */	Ucbit	type_modifier	: 7;	/*  1 */	Ucbit	iso_version	: 2;	/*  2 */	Ucbit	ecma_version	: 3;	Ucbit	ansi_version	: 3;	/*  2 */	Ucbit	aenc		: 1;	/*  3 */	Ucbit	termiop		: 1;	Ucbit	res3_54		: 2;	Ucbit	data_format	: 4;	/*  3 */	Ucbit	add_len		: 8;	/*  4 */	Ucbit	sense_len	: 8;	/*  5 */ /* only Emulex ??? */	Ucbit	res2		: 8;	/*  6 */	Ucbit	reladr		: 1;	/*  7 */	Ucbit	wbus32		: 1;	Ucbit	wbus16		: 1;	Ucbit	sync		: 1;	Ucbit	linked		: 1;	Ucbit	res7_2		: 1;	Ucbit	cmdque		: 1;	Ucbit	softreset	: 1;	char	vendor_info[8];		/*  8 */	char	prod_ident[16];		/* 16 */	char	prod_revision[4];	/* 32 */#ifdef	comment	char	vendor_uniq[20];	/* 36 */	char	reserved[40];		/* 56 */#endif};					/* 96 */#endif#define	info		vendor_info#define	ident		prod_ident#define	revision	prod_revision/* Peripheral Device Qualifier */#define	INQ_DEV_PRESENT	0x00		/* Physical device present */#define	INQ_DEV_NOTPR	0x01		/* Physical device not present */#define	INQ_DEV_RES	0x02		/* Reserved */#define	INQ_DEV_NOTSUP	0x03		/* Logical unit not supported *//* Peripheral Device Type */#define	INQ_DASD	0x00		/* Direct-access device (disk) */#define	INQ_SEQD	0x01		/* Sequential-access device (tape) */#define	INQ_PRTD	0x02 		/* Printer device */#define	INQ_PROCD	0x03 		/* Processor device */#define	INQ_OPTD	0x04		/* Write once device (optical disk) */#define	INQ_WORM	0x04		/* Write once device (optical disk) */#define	INQ_ROMD	0x05		/* CD-ROM device */#define	INQ_SCAN	0x06		/* Scanner device */#define	INQ_OMEM	0x07		/* Optical Memory device */#define	INQ_JUKE	0x08		/* Medium Changer device (jukebox) */#define	INQ_COMM	0x09		/* Communications device */#define	INQ_IT8_1	0x0A		/* IT8 */#define	INQ_IT8_2	0x0B		/* IT8 */#define	INQ_STARR	0x0C		/* Storage array device */#define	INQ_ENCL	0x0D		/* Enclosure services device */#define	INQ_NODEV	0x1F		/* Unknown or no device */#define	INQ_NOTPR	0x1F		/* Logical unit not present (SCSI-1) */#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct scsi_mode_header {	Ucbit	sense_data_len	: 8;	u_char	medium_type;	Ucbit	res2		: 4;	Ucbit	cache		: 1;	Ucbit	res		: 2;	Ucbit	write_prot	: 1;	u_char	blockdesc_len;};#else					/* Motorola byteorder */struct scsi_mode_header {	Ucbit	sense_data_len	: 8;	u_char	medium_type;	Ucbit	write_prot	: 1;	Ucbit	res		: 2;	Ucbit	cache		: 1;	Ucbit	res2		: 4;	u_char	blockdesc_len;};#endifstruct scsi_modesel_header {	Ucbit	sense_data_len	: 8;	u_char	medium_type;	Ucbit	res2		: 8;	u_char	blockdesc_len;};struct scsi_mode_blockdesc {	u_char	density;	u_char	nlblock[3];	Ucbit	res		: 8;	u_char	lblen[3];};#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct acb_mode_data {	u_char	listformat;	u_char	ncyl[2];	u_char	nhead;	u_char	start_red_wcurrent[2];	u_char	start_precomp[2];	u_char	landing_zone;	u_char	step_rate;	Ucbit			: 2;	Ucbit	hard_sec	: 1;	Ucbit	fixed_media	: 1;	Ucbit			: 4;	u_char	sect_per_trk;};#else					/* Motorola byteorder */struct acb_mode_data {	u_char	listformat;	u_char	ncyl[2];	u_char	nhead;	u_char	start_red_wcurrent[2];	u_char	start_precomp[2];	u_char	landing_zone;	u_char	step_rate;	Ucbit			: 4;	Ucbit	fixed_media	: 1;	Ucbit	hard_sec	: 1;	Ucbit			: 2;	u_char	sect_per_trk;};#endif#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct scsi_mode_page_header {	Ucbit	p_code		: 6;	Ucbit	res		: 1;	Ucbit	parsave		: 1;	u_char	p_len;};/* * This is a hack that allows mode pages without * any further bitfileds to be defined bitorder independent. */#define	MP_P_CODE			\	Ucbit	p_code		: 6;	\	Ucbit	p_res		: 1;	\	Ucbit	parsave		: 1#else					/* Motorola byteorder */struct scsi_mode_page_header {	Ucbit	parsave		: 1;	Ucbit	res		: 1;	Ucbit	p_code		: 6;	u_char	p_len;};/* * This is a hack that allows mode pages without * any further bitfileds to be defined bitorder independent. */#define	MP_P_CODE			\	Ucbit	parsave		: 1;	\	Ucbit	p_res		: 1;	\	Ucbit	p_code		: 6#endif#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct scsi_mode_page_01 {		/* Error recovery Parameters */		MP_P_CODE;		/* parsave & pagecode */	u_char	p_len;			/* 0x0A = 12 Bytes */	Ucbit	disa_correction	: 1;	/* Byte 2 */	Ucbit	term_on_rec_err	: 1;	Ucbit	report_rec_err	: 1;	Ucbit	en_early_corr	: 1;	Ucbit	read_continuous	: 1;	Ucbit	tranfer_block	: 1;	Ucbit	en_auto_reall_r	: 1;	Ucbit	en_auto_reall_w	: 1;	/* Byte 2 */	u_char	rd_retry_count;		/* Byte 3 */	u_char	correction_span;	char	head_offset_count;	char	data_strobe_offset;	u_char	res;	u_char	wr_retry_count;	u_char	res_tape[2];	u_char	recov_timelim[2];};#else					/* Motorola byteorder */struct scsi_mode_page_01 {		/* Error recovery Parameters */		MP_P_CODE;		/* parsave & pagecode */	u_char	p_len;			/* 0x0A = 12 Bytes */	Ucbit	en_auto_reall_w	: 1;	/* Byte 2 */	Ucbit	en_auto_reall_r	: 1;	Ucbit	tranfer_block	: 1;	Ucbit	read_continuous	: 1;	Ucbit	en_early_corr	: 1;	Ucbit	report_rec_err	: 1;	Ucbit	term_on_rec_err	: 1;	Ucbit	disa_correction	: 1;	/* Byte 2 */	u_char	rd_retry_count;		/* Byte 3 */	u_char	correction_span;	char	head_offset_count;	char	data_strobe_offset;	u_char	res;	u_char	wr_retry_count;	u_char	res_tape[2];	u_char	recov_timelim[2];};#endif#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct scsi_mode_page_02 {		/* Device dis/re connect Parameters */		MP_P_CODE;		/* parsave & pagecode */	u_char	p_len;			/* 0x0E = 16 Bytes */	u_char	buf_full_ratio;	u_char	buf_empt_ratio;	u_char	bus_inact_limit[2];	u_char	disc_time_limit[2];	u_char	conn_time_limit[2];	u_char	max_burst_size[2];	/* Start SCSI-2 */	Ucbit	data_tr_dis_ctl	: 2;	Ucbit			: 6;	u_char	res[3];};#else					/* Motorola byteorder */struct scsi_mode_page_02 {		/* Device dis/re connect Parameters */		MP_P_CODE;		/* parsave & pagecode */	u_char	p_len;			/* 0x0E = 16 Bytes */	u_char	buf_full_ratio;	u_char	buf_empt_ratio;	u_char	bus_inact_limit[2];	u_char	disc_time_limit[2];	u_char	conn_time_limit[2];	u_char	max_burst_size[2];	/* Start SCSI-2 */	Ucbit			: 6;	Ucbit	data_tr_dis_ctl	: 2;	u_char	res[3];};#endif#define	DTDC_DATADONE	0x01		/*					 * Target may not disconnect once					 * data transfer is started until					 * all data successfully transferred.					 */#define	DTDC_CMDDONE	0x03		/*					 * Target may not disconnect once					 * data transfer is started until					 * command completed.					 */#if	defined(_BIT_FIELDS_LTOH)	/* Intel byteorder */struct scsi_mode_page_03 {		/* Direct access format Paramters */