<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x34</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_TSHR">SSC_TSHR</a></font></td><td><font size="-1">Transmit Sync Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x38</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_RC0R">SSC_RC0R</a></font></td><td><font size="-1">Receive Compare 0 Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x3C</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_RC1R">SSC_RC1R</a></font></td><td><font size="-1">Receive Compare 1 Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x40</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_SR">SSC_SR</a></font></td><td><font size="-1">Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x44</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_IER">SSC_IER</a></font></td><td><font size="-1">Interrupt Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x48</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_IDR">SSC_IDR</a></font></td><td><font size="-1">Interrupt Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4C</b></font></td><td><font size="-1"><a href="AT91RM9200_SSC.html#SSC_IMR">SSC_IMR</a></font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x100</b></font></td><td><font size="-1">SSC_RPR (<a href="AT91RM9200_PDC.html#PDC_RPR">PDC_RPR</a>)</font></td><td><font size="-1">Receive Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x104</b></font></td><td><font size="-1">SSC_RCR (<a href="AT91RM9200_PDC.html#PDC_RCR">PDC_RCR</a>)</font></td><td><font size="-1">Receive Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x108</b></font></td><td><font size="-1">SSC_TPR (<a href="AT91RM9200_PDC.html#PDC_TPR">PDC_TPR</a>)</font></td><td><font size="-1">Transmit Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x10C</b></font></td><td><font size="-1">SSC_TCR (<a href="AT91RM9200_PDC.html#PDC_TCR">PDC_TCR</a>)</font></td><td><font size="-1">Transmit Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x110</b></font></td><td><font size="-1">SSC_RNPR (<a href="AT91RM9200_PDC.html#PDC_RNPR">PDC_RNPR</a>)</font></td><td><font size="-1">Receive Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x114</b></font></td><td><font size="-1">SSC_RNCR (<a href="AT91RM9200_PDC.html#PDC_RNCR">PDC_RNCR</a>)</font></td><td><font size="-1">Receive Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x118</b></font></td><td><font size="-1">SSC_TNPR (<a href="AT91RM9200_PDC.html#PDC_TNPR">PDC_TNPR</a>)</font></td><td><font size="-1">Transmit Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x11C</b></font></td><td><font size="-1">SSC_TNCR (<a href="AT91RM9200_PDC.html#PDC_TNCR">PDC_TNCR</a>)</font></td><td><font size="-1">Transmit Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x120</b></font></td><td><font size="-1">SSC_PTCR (<a href="AT91RM9200_PDC.html#PDC_PTCR">PDC_PTCR</a>)</font></td><td><font size="-1">PDC Transfer Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x124</b></font></td><td><font size="-1">SSC_PTSR (<a href="AT91RM9200_PDC.html#PDC_PTSR">PDC_PTSR</a>)</font></td><td><font size="-1">PDC Transfer Status Register</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_Configure">AT91F_SSC_Configure</a></b></font></td><td><font size="-1">Configure SSC</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_DisableRx">AT91F_SSC_DisableRx</a></b></font></td><td><font size="-1">Disable receiving datas</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_SendFrame">AT91F_SSC_SendFrame</a></b></font></td><td><font size="-1">Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_DisableIt">AT91F_SSC_DisableIt</a></b></font></td><td><font size="-1">Disable SSC IT</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_EnableRx">AT91F_SSC_EnableRx</a></b></font></td><td><font size="-1">Enable receiving datas</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_ReceiveFrame">AT91F_SSC_ReceiveFrame</a></b></font></td><td><font size="-1">Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_EnableIt">AT91F_SSC_EnableIt</a></b></font></td><td><font size="-1">Enable SSC IT</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_SetBaudrate">AT91F_SSC_SetBaudrate</a></b></font></td><td><font size="-1">Set the baudrate according to the CPU clock</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_IsInterruptMasked">AT91F_SSC_IsInterruptMasked</a></b></font></td><td><font size="-1">Test if SSC Interrupt is Masked </font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_GetInterruptMaskStatus">AT91F_SSC_GetInterruptMaskStatus</a></b></font></td><td><font size="-1">Return SSC Interrupt Mask Status</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_DisableTx">AT91F_SSC_DisableTx</a></b></font></td><td><font size="-1">Disable sending datas</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91RM9200_h.html#AT91F_SSC_EnableTx">AT91F_SSC_EnableTx</a></b></font></td><td><font size="-1">Enable sending datas</font></td></tr>
</null></table></null><h2>SSC Register Description</h2>
<null><a name="SSC_CR"></a><h4><a href="#SSC">SSC</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> SSC_CR  <i>Control Register</i></h4><ul><null><font size="-2"><li><b>SSC2</b> <i><a href="AT91RM9200_h.html#AT91C_SSC2_CR">AT91C_SSC2_CR</a></i> 0xFFFD8000</font><font size="-2"><li><b>SSC1</b> <i><a href="AT91RM9200_h.html#AT91C_SSC1_CR">AT91C_SSC1_CR</a></i> 0xFFFD4000</font><font size="-2"><li><b>SSC0</b> <i><a href="AT91RM9200_h.html#AT91C_SSC0_CR">AT91C_SSC0_CR</a></i> 0xFFFD0000</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="SSC_RXEN"></a><b>SSC_RXEN</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_SSC_RXEN">AT91C_SSC_RXEN</a></font></td><td><b>Receive Enable</b><br>0: No effect.<br>1: Enables Receive if RXDIS is not set.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="SSC_RXDIS"></a><b>SSC_RXDIS</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_SSC_RXDIS">AT91C_SSC_RXDIS</a></font></td><td><b>Receive Disable</b><br>0: No effect.<br>1: Disables Receive.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="SSC_TXEN"></a><b>SSC_TXEN</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_SSC_TXEN">AT91C_SSC_TXEN</a></font></td><td><b>Transmit Enable</b><br>0: No effect.<br>1: Enables Transmit if TXDIS is not set.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="SSC_TXDIS"></a><b>SSC_TXDIS</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_SSC_TXDIS">AT91C_SSC_TXDIS</a></font></td><td><b>Transmit Disable</b><br>0: No effect.<br>1: Disables Transmit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15</td><td align="CENTER"><a name="SSC_SWRST"></a><b>SSC_SWRST</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_SSC_SWRST">AT91C_SSC_SWRST</a></font></td><td><b>Software Reset</b><br>0: No effect.<br>1: Performs a software reset. Has priority on any other bit in SSC_CR.</td></tr>
</null></table>
<a name="SSC_CMR"></a><h4><a href="#SSC">SSC</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> SSC_CMR  <i>Clock Mode Register</i></h4><ul><null><font size="-2"><li><b>SSC2</b> <i><a href="AT91RM9200_h.html#AT91C_SSC2_CMR">AT91C_SSC2_CMR</a></i> 0xFFFD8004</font><font size="-2"><li><b>SSC1</b> <i><a href="AT91RM9200_h.html#AT91C_SSC1_CMR">AT91C_SSC1_CMR</a></i> 0xFFFD4004</font><font size="-2"><li><b>SSC0</b> <i><a href="AT91RM9200_h.html#AT91C_SSC0_CMR">AT91C_SSC0_CMR</a></i> 0xFFFD0004</font></null></ul><br>Clock Divider<br>0: The Clock Divider is not active.<br>Any Other Value: The Divided Clock equals the Master Clock divided by 2 times DIV. The maximum bit rate is MCK/2. The minimum bit rate is MCK/2 x 4095 = MCK/8190.<a name="SSC_RCMR"></a><h4><a href="#SSC">SSC</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> SSC_RCMR  <i>Receive Clock ModeRegister</i></h4><ul><null><font size="-2"><li><b>SSC2</b> <i><a href="AT91RM9200_h.html#AT91C_SSC2_RCMR">AT91C_SSC2_RCMR</a></i> 0xFFFD8010</font><font size="-2"><li><b>SSC1</b> <i><a href="AT91RM9200_h.html#AT91C_SSC1_RCMR">AT91C_SSC1_RCMR</a></i> 0xFFFD4010</font><font size="-2"><li><b>SSC0</b> <i><a href="AT91RM9200_h.html#AT91C_SSC0_RCMR">AT91C_SSC0_RCMR</a></i> 0xFFFD0010</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">1..0</td><td align="CENTER"><a name="SSC_CKS"></a><b>SSC_CKS</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_SSC_CKS">AT91C_SSC_CKS</a></font></td><td><b>Receive/Transmit Clock Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="SSC_CKS_DIV"></a><b>SSC_CKS_DIV</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_SSC_CKS_DIV">AT91C_SSC_CKS_DIV</a></font></td><td><br>Divided Clock</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="SSC_CKS_TK"></a><b>SSC_CKS_TK</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_SSC_CKS_TK">AT91C_SSC_CKS_TK</a></font></td><td><br>TK Clock signal</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="SSC_CKS_RK"></a><b>SSC_CKS_RK</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_SSC_CKS_RK">AT91C_SSC_CKS_RK</a></font></td><td><br>RK pin</td></tr>