?? combine.crp
字號(hào):
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PSDsoft Express Version 8.21
Output of PSD Configurations
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PROJECT : combine DATE : 04/15/2006
DEVICE : uPSD3254A TIME : 11:19:11
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==== Bus Interface ====
Data Bus Width = 8-Bit
Address/Data Mode = Multiplexed
ALE/AS Signal = Active High
Control Signals = /WR,/RD,/PSEN
Main PSD flash memory will reside in this space at power-up = Program space
Secondary PSD flash memory will reside in this space at power-up = Data space
==== Other Configurations ====
Enable Chip-Select Input(/CSI) = OFF
Enable Standby Voltage Input (PC2) = OFF
Enable Standby-on Indicator (PC4) = OFF
Enable RDY/Busy function (PC3) = OFF
Load Micro-Cell on edge
Security Protection = OFF
==== JTAG Configurations ====
Enable TMS/TCK/TDI/TDO on PC0/PC1/PC5/PC6, respectively = ON
Enables JTAG signal TSTAT on PC3 = ON
Enables JTAG signal TERR on PC4 = ON
User Code = FFFFFFFF
==== Flash Sector Protect ====
Flash Sector 0 is unprotected
Flash Sector 1 is unprotected
Flash Sector 2 is unprotected
Flash Sector 3 is unprotected
Flash Sector 4 is unprotected
Flash Sector 5 is unprotected
Flash Sector 6 is unprotected
Flash Sector 7 is unprotected
Flash Boot Sector 0 is unprotected
Flash Boot Sector 1 is unprotected
Flash Boot Sector 2 is unprotected
Flash Boot Sector 3 is unprotected
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