?? iirno.fit.eqn

?? 《CPLD_FPGA設(shè)計及應(yīng)用》課件與實例
?? EQN
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regxn0acs[1] = OUTPUT(regxn0a[1]);


--regxn0acs[0] is regxn0acs[0] at PIN_P20
--operation mode is output

regxn0acs[0] = OUTPUT(regxn0a[0]);


--regxn1acs[9] is regxn1acs[9] at PIN_H12
--operation mode is output

regxn1acs[9] = OUTPUT(regxn1a[9]);


--regxn1acs[8] is regxn1acs[8] at PIN_D12
--operation mode is output

regxn1acs[8] = OUTPUT(regxn1a[8]);


--regxn1acs[7] is regxn1acs[7] at PIN_L15
--operation mode is output

regxn1acs[7] = OUTPUT(regxn1a[7]);


--regxn1acs[6] is regxn1acs[6] at PIN_E12
--operation mode is output

regxn1acs[6] = OUTPUT(regxn1a[6]);


--regxn1acs[5] is regxn1acs[5] at PIN_K15
--operation mode is output

regxn1acs[5] = OUTPUT(regxn1a[5]);


--regxn1acs[4] is regxn1acs[4] at PIN_AB17
--operation mode is output

regxn1acs[4] = OUTPUT(regxn1a[4]);


--regxn1acs[3] is regxn1acs[3] at PIN_G15
--operation mode is output

regxn1acs[3] = OUTPUT(regxn1a[3]);


--regxn1acs[2] is regxn1acs[2] at PIN_K19
--operation mode is output

regxn1acs[2] = OUTPUT(regxn1a[2]);


--regxn1acs[1] is regxn1acs[1] at PIN_K16
--operation mode is output

regxn1acs[1] = OUTPUT(regxn1a[1]);


--regxn1acs[0] is regxn1acs[0] at PIN_L21
--operation mode is output

regxn1acs[0] = OUTPUT(regxn1a[0]);


--regxn2acs[9] is regxn2acs[9] at PIN_A10
--operation mode is output

regxn2acs[9] = OUTPUT(regxn2a[9]);


--regxn2acs[8] is regxn2acs[8] at PIN_E11
--operation mode is output

regxn2acs[8] = OUTPUT(regxn2a[8]);


--regxn2acs[7] is regxn2acs[7] at PIN_AA18
--operation mode is output

regxn2acs[7] = OUTPUT(regxn2a[7]);


--regxn2acs[6] is regxn2acs[6] at PIN_A8
--operation mode is output

regxn2acs[6] = OUTPUT(regxn2a[6]);


--regxn2acs[5] is regxn2acs[5] at PIN_W16
--operation mode is output

regxn2acs[5] = OUTPUT(regxn2a[5]);


--regxn2acs[4] is regxn2acs[4] at PIN_N21
--operation mode is output

regxn2acs[4] = OUTPUT(regxn2a[4]);


--regxn2acs[3] is regxn2acs[3] at PIN_A7
--operation mode is output

regxn2acs[3] = OUTPUT(regxn2a[3]);


--regxn2acs[2] is regxn2acs[2] at PIN_U22
--operation mode is output

regxn2acs[2] = OUTPUT(regxn2a[2]);


--regxn2acs[1] is regxn2acs[1] at PIN_P18
--operation mode is output

regxn2acs[1] = OUTPUT(regxn2a[1]);


--regxn2acs[0] is regxn2acs[0] at PIN_R18
--operation mode is output

regxn2acs[0] = OUTPUT(regxn2a[0]);


--dataxnacs[9] is dataxnacs[9] at PIN_E10
--operation mode is output

dataxnacs[9] = OUTPUT(GND);


--dataxnacs[8] is dataxnacs[8] at PIN_D3
--operation mode is output

dataxnacs[8] = OUTPUT(GND);


--dataxnacs[7] is dataxnacs[7] at PIN_U17
--operation mode is output

dataxnacs[7] = OUTPUT(GND);


--dataxnacs[6] is dataxnacs[6] at PIN_AA9
--operation mode is output

dataxnacs[6] = OUTPUT(GND);


--dataxnacs[5] is dataxnacs[5] at PIN_V6
--operation mode is output

dataxnacs[5] = OUTPUT(GND);


--dataxnacs[4] is dataxnacs[4] at PIN_E2
--operation mode is output

dataxnacs[4] = OUTPUT(GND);


--dataxnacs[3] is dataxnacs[3] at PIN_U15
--operation mode is output

dataxnacs[3] = OUTPUT(GND);


--dataxnacs[2] is dataxnacs[2] at PIN_U2
--operation mode is output

dataxnacs[2] = OUTPUT(GND);


--dataxnacs[1] is dataxnacs[1] at PIN_R6
--operation mode is output

dataxnacs[1] = OUTPUT(GND);


--dataxnacs[0] is dataxnacs[0] at PIN_E4
--operation mode is output

dataxnacs[0] = OUTPUT(GND);


--regyn0acs[9] is regyn0acs[9] at PIN_T13
--operation mode is output

regyn0acs[9] = OUTPUT(regyn0a[9]);


--regyn0acs[8] is regyn0acs[8] at PIN_D11
--operation mode is output

regyn0acs[8] = OUTPUT(regyn0a[8]);


--regyn0acs[7] is regyn0acs[7] at PIN_AA16
--operation mode is output

regyn0acs[7] = OUTPUT(regyn0a[7]);


--regyn0acs[6] is regyn0acs[6] at PIN_AA15
--operation mode is output

regyn0acs[6] = OUTPUT(regyn0a[6]);


--regyn0acs[5] is regyn0acs[5] at PIN_Y17
--operation mode is output

regyn0acs[5] = OUTPUT(regyn0a[5]);


--regyn0acs[4] is regyn0acs[4] at PIN_K20
--operation mode is output

regyn0acs[4] = OUTPUT(regyn0a[4]);


--regyn0acs[3] is regyn0acs[3] at PIN_K18
--operation mode is output

regyn0acs[3] = OUTPUT(regyn0a[3]);


--regyn0acs[2] is regyn0acs[2] at PIN_K22
--operation mode is output

regyn0acs[2] = OUTPUT(regyn0a[2]);


--regyn0acs[1] is regyn0acs[1] at PIN_L16
--operation mode is output

regyn0acs[1] = OUTPUT(regyn0a[1]);


--regyn0acs[0] is regyn0acs[0] at PIN_Y14
--operation mode is output

regyn0acs[0] = OUTPUT(regyn0a[0]);


--regyn1acs[9] is regyn1acs[9] at PIN_U13
--operation mode is output

regyn1acs[9] = OUTPUT(regyn1a[9]);


--regyn1acs[8] is regyn1acs[8] at PIN_C12
--operation mode is output

regyn1acs[8] = OUTPUT(regyn1a[8]);


--regyn1acs[7] is regyn1acs[7] at PIN_U12
--operation mode is output

regyn1acs[7] = OUTPUT(regyn1a[7]);


--regyn1acs[6] is regyn1acs[6] at PIN_AB15
--operation mode is output

regyn1acs[6] = OUTPUT(regyn1a[6]);


--regyn1acs[5] is regyn1acs[5] at PIN_Y13
--operation mode is output

regyn1acs[5] = OUTPUT(regyn1a[5]);


--regyn1acs[4] is regyn1acs[4] at PIN_U14
--operation mode is output

regyn1acs[4] = OUTPUT(regyn1a[4]);


--regyn1acs[3] is regyn1acs[3] at PIN_T21
--operation mode is output

regyn1acs[3] = OUTPUT(regyn1a[3]);


--regyn1acs[2] is regyn1acs[2] at PIN_R22
--operation mode is output

regyn1acs[2] = OUTPUT(regyn1a[2]);


--regyn1acs[1] is regyn1acs[1] at PIN_P17
--operation mode is output

regyn1acs[1] = OUTPUT(regyn1a[1]);


--regyn1acs[0] is regyn1acs[0] at PIN_R14
--operation mode is output

regyn1acs[0] = OUTPUT(regyn1a[0]);


--clkregbtcs is clkregbtcs at PIN_G19
--operation mode is output

clkregbtcs = OUTPUT(A1L133);


--clkregcs is clkregcs at PIN_E14
--operation mode is output

clkregcs = OUTPUT(clkreg);


--clkencs is clkencs at PIN_C7
--operation mode is output

clkencs = OUTPUT(clken);


--clrsmcs is clrsmcs at PIN_C8
--operation mode is output

clrsmcs = OUTPUT(clrsm);


--nclkencs is nclkencs at PIN_B7
--operation mode is output

nclkencs = OUTPUT(!clken);


--countercs[3] is countercs[3] at PIN_F14
--operation mode is output

countercs[3] = OUTPUT(C1_safe_q[3]);


--countercs[2] is countercs[2] at PIN_J15
--operation mode is output

countercs[2] = OUTPUT(C1_safe_q[2]);


--countercs[1] is countercs[1] at PIN_H17
--operation mode is output

countercs[1] = OUTPUT(C1_safe_q[1]);


--countercs[0] is countercs[0] at PIN_E15
--operation mode is output

countercs[0] = OUTPUT(C1_safe_q[0]);


--counterbtcs[3] is counterbtcs[3] at PIN_A18
--operation mode is output

counterbtcs[3] = OUTPUT(counterbt[3]);


--counterbtcs[2] is counterbtcs[2] at PIN_B17
--operation mode is output

counterbtcs[2] = OUTPUT(counterbt[2]);


--counterbtcs[1] is counterbtcs[1] at PIN_C17
--operation mode is output

counterbtcs[1] = OUTPUT(counterbt[1]);


--counterbtcs[0] is counterbtcs[0] at PIN_D14
--operation mode is output

counterbtcs[0] = OUTPUT(counterbt[0]);


--resultacs[17] is resultacs[17] at PIN_J18
--operation mode is output

resultacs[17] = OUTPUT(A1L816);


--resultacs[16] is resultacs[16] at PIN_Y16
--operation mode is output

resultacs[16] = OUTPUT(A1L616);


--resultacs[15] is resultacs[15] at PIN_J21
--operation mode is output

resultacs[15] = OUTPUT(A1L416);


--resultacs[14] is resultacs[14] at PIN_G17
--operation mode is output

resultacs[14] = OUTPUT(A1L216);


--resultacs[13] is resultacs[13]
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?? iirno.fit.eqn

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