//*----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name           : Cstartup_EB40A.c
//* Object              : Low level initializations written in C for Green Hills
//*                       tools
//* Creation            : 03/Jan/03
//* 
//*----------------------------------------------------------------------------

// Include Standard LIB V3 files you must be define AT91M40008 in gree Hills Tools
//* $$$
#include "include/AT91R40008.h"
#include "include/lib_AT91R40008.h"

// Include the board file description containing the EBI value
#include "eb40A.h"

// The following functions must be write in ARM mode this function called directly
// by exception vector
extern void AT91F_Spurious_handler(void);
extern void AT91F_Default_IRQ_handler(void);
extern void AT91F_Default_FIQ_handler(void);

// Vector table definition check this table in ARM file init_reset_eb55.arm
extern unsigned int VectorTable[];
extern unsigned int __ghs_eofn_VectorTable[];
 
// Green Hills link file, define the address for mode Flash or RAM
extern unsigned int __iramstart[];

#pragma ghs section text=".reset" 
//*----------------------------------------------------------------------------
//* \fn    AT91F_LowLevelInit
//* \brief This function performs very low level HW initialization
//*        this function can be use a Stack, depending the compilation 
//*        optimization mode
//* Input Parameters
//* <Vector>  vector table Address determinate in Relative addressing
//* <InternalRam> Internal Address determinate in Relative addressing
//* Output Parameters 
//* <EBI address>
//*----------------------------------------------------------------------------
AT91_REG * AT91F_LowLevelInit( unsigned int * Vector, unsigned int * InternalRam)
{
 int            i;

 AT91PS_EBI     pEbi;
 AT91PS_AIC     pAic;

	//-----------------------------------------------------------------------------
	// Speed up the Boot sequence
	//---------------------------
	// After reset, the number of wait states on chip select 0 is 8. All AT91 
	// Evaluation Boards fits fast flash memories, so that the number of wait 
	// states can be optimized to fast up the boot sequence.
	//-----------------------------------------------------------------------------
 	// set sandart Wait State
 	pEbi = AT91C_BASE_EBI ;
 	pEbi->EBI_CSR[0] = EBI_CSR_0 ;	

	//-----------------------------------------------------------------------------
	//  Set up EBI value
	//--------------------
	// After reset, All EBI register are setted at the default value 
	// The new value will be effective only after the remap command
	//-----------------------------------------------------------------------------
	// Load System pEbi Base address and CSR0 Init Value
	pEbi->EBI_CSR[1] = EBI_CSR_1 ;
	pEbi->EBI_CSR[2] = EBI_CSR_2 ;
	pEbi->EBI_CSR[3] = EBI_CSR_3 ;
	pEbi->EBI_CSR[4] = EBI_CSR_4 ;
	pEbi->EBI_CSR[5] = EBI_CSR_5 ;
	pEbi->EBI_CSR[6] = EBI_CSR_6 ;
	pEbi->EBI_CSR[7] = EBI_CSR_7 ;
	// 6 memory regions, standard read
	pEbi->EBI_MCR =	6 ;
	//-----------------------------------------------------------------------------
	// Reset the Interrupt Controller
	//-------------------------------
	// Normally, the code is executed only if a reset has been actually performed.
	// So, the AIC initialization resumes at setting up the default vectors.
	//-----------------------------------------------------------------------------
	// Load System pAic Base address 
	pAic = AT91C_BASE_AIC; 
	
	// Mask All interrupt
	pAic->AIC_IDCR = 0xFFFFFFFF;
	
	// Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ 
	for (i=0;i < 8; i++)
	{
		AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
	}

	// Set up the default interrupts handler vectors
	pAic->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
	for (i=1;i < 31; i++)
	{
		pAic->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
	}
	pAic->AIC_SPU  = (int) AT91F_Spurious_handler ;
	
	//-----------------------------------------------------------------------------
	// Setup Exception Vectors in Internal RAM before Remap
	//-----------------------------------------------------
	// That's important to perform this operation before Remap in order to guarantee
	// that the core has valid vectors at any time during the remap operation.
	// Note: There are only 5 offsets as the vectoring is used.
	// Before Remap the internal RAM it's 0x300000
	// After  Remap the internal RAM it's 0x000000
	// Remap it's already executed it's no possible to write to 0x300000.
	//-----------------------------------------------------------------------------
	//  Copy the ARM exception vectors and indirect table
	InternalRam = __iramstart;
	for  (i=0;i < __ghs_eofn_VectorTable-VectorTable; i++ )
	{
	   *InternalRam++=*Vector++;
	}
	
	return ( &pEbi->EBI_RCR); 
}