#include "..\inc\general.H"
/**************/
/*2404*/
/**************/

//#define SDA_24CXX	P36
//#define SCL_24CXX	P37
#define SDA_24CXX	P13
#define SCL_24CXX	P14

#if	0
sbit WP_24CXX=P2^7;
#define  CLR_WP_24CXX	WP_24CXX=0;
#define  SET_WP_24CXX	WP_24CXX=1;
#else
#define  CLR_WP_24CXX	
#define  SET_WP_24CXX	
#endif


uchar EepromType=M2464; //user define eprom type
uchar BYTE_PER_PAGE =M2464P;  //use define  page BYTE
uchar IICdevice_ID=0xa0;
void NAK_24CXX(void )
{
/*
	; Clock out a negative acknowledge bit (high).
	; SCL expected low on entry. Return with SCL low, SDA high.
*/
		SDA_24CXX=1;	//	; NAK bit
		 _nop_ ();  	//		; enforce SCL low and data setup
		 _nop_ ();	//;
		SCL_24CXX=1;//		; raise clock
		_nop_ ();//nop			; enforce SCL high
		_nop_ ();//			;
		_nop_ ();//			;
		SCL_24CXX=0;//		; drop clock
		
}

void ACK_24CXX(void)
{

//	; Clock out an acknowledge bit (low).
//	; SCL expected low on entry. Return with SCL, SDA low.

		SDA_24CXX=0;//		; ACK bit
		_nop_ (); //		//	; enforce SCL low and data setup
		_nop_ (); //		//	;
		SCL_24CXX=1;		//; raise clock
		_nop_ (); //		//	; enforce SCL high
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //			;
		SCL_24CXX=0;//		; drop clock


}


unsigned char shin_24CXX()
{
unsigned char i,in_data=0;
//	; Shift in a byte from the AT24Cxx, most significant bit first.
//	; SCL expected low on entry. Return with SCL low.
//	; Returns received data byte in A.

		SDA_24CXX=1;//		; make SDA an input

		for (i=0;i<8;i++){
		in_data=in_data<<1;
		_nop_ (); //			; enforce SCL low and data setup
		_nop_ (); //			;
		_nop_ (); //			;
		SCL_24CXX=1;//		; raise clock
		_nop_ (); //			; enforce SCL high
		_nop_ (); //			;
		if(SDA_24CXX)in_data|=0x01;//		; input bit
		
		SCL_24CXX=0;//		; drop clock
	}
	return in_data;
}

bit shout_24CXX(unsigned char out_data)
{
unsigned char i;
	
/*	; Shift out a byte to the AT24Cxx, most significant bit first.
	; SCL, SDA expected low on entry. Return with SCL low.
	; Called with data to send in A.
	; Returns CY set to indicate failure by slave to acknowledge.
	; Destroys A.
*/
for (i=0;i<8;i++){
		if (out_data&0x80)SDA_24CXX=1;//		; move bit into CY
		else SDA_24CXX=0;		//	; output bit
		_nop_ (); //	//		; enforce SCL low and data setup
		SCL_24CXX=1;//		; raise clock
		_nop_ (); //			; enforce SCL high
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //			;
		SCL_24CXX=0;//		; drop clock
		out_data=out_data<<1;
		}

		SDA_24CXX=1;//		; release SDA for ACK
		_nop_ (); //			; enforce SCL low and tAA
		_nop_ (); //			;
		SCL_24CXX=1;//		; raise ACK clock
		_nop_ (); //			; enforce SCL high
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //
	
		if(SDA_24CXX){SCL_24CXX=0;return 1;}//		; get ACK bit
		else {SCL_24CXX=0;return 0 ;}
		
		

}		



void stop_24CXX()
{
//	; Send STOP, defined as low-to-high SDA with SCL high.
//	; SCL expected low on entry. Return with SCL, SDA high.

		SDA_24CXX=0;
		_nop_ (); //	//		; enforce SCL low and data setup
		_nop_ (); //
		SCL_24CXX=1;
		_nop_ (); //	//		; enforce setup delay
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //			;
		SDA_24CXX=1;
		
}

bit start_24CXX()
{/*
	; Send START, defined as high-to-low SDA with SCL high.
	; Return with SCL, SDA low.
	; Returns CY set if bus is not available.
*/
		SDA_24CXX=1;
		SCL_24CXX=1;

		//; Verify bus available.

		if(!SDA_24CXX)return 1; //0	; jump if not high
		if(!SCL_24CXX)return 1; //, x40	; jump if not high

		_nop_ (); //			; enforce setup delay and cycle delay
		SDA_24CXX=0;
		_nop_ (); //			; enforce hold delay
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //			;
		_nop_ (); //			;
		SCL_24CXX=0;

		return 0;//	; clear error flag
}		



/*********************************
1:error
********************************/
bit read_current_24CXX(unsigned char  *buffer )
{

//	unsigned char R_addr;
/*
	; AT24Cxx Current Address Read function.
	; Called with programmable address in A. Returns data in A.
	; Returns CY set to indicate that the bus is not available
	; or that the addressed device failed to acknowledge.
*/
		if(start_24CXX())return 1;
				// abort if bus not available

		          //; programmable address to bits 3:1

			                   //; specify read operation
		if(shout_24CXX(IICdevice_ID|0x01))
		{stop_24CXX();return 1;}//		; send device address
			//; abort if no acknowledge

		*buffer=shin_24CXX();//		; receive data byte
		
		NAK_24CXX();	      //	; do not acknowledge byte
		stop_24CXX();
		return 0;     //	; clear error flag
}

bit set_epaddr(unsigned int data_addr)
{

		if(start_24CXX())return 1;
		//; abort if bus not available
		;	//; add fixed address
			                   //; specify read operation
		if(shout_24CXX(IICdevice_ID&0xfe))  //write op 
		{stop_24CXX();return 1;}	//; abort if no acknowledge

		if(EepromType>M2416){
		if(shout_24CXX(data_addr/256))
		{stop_24CXX();return 1;}//		; hibyte
		}

		if(shout_24CXX(data_addr%256))
		{stop_24CXX();return 1;}//		; lowaddr 

		return 0;
}

	
bit read_random_24CXX(unsigned int data_addr,unsigned char  *rd_buffer  )
{

/*
	; AT24Cxx Random Read function.
	; Called with programmable address in A, byte address in
	; register pair ADDR_HI:ADDR_LO. Returns data in A.
	; Returns CY set to indicate that the bus is not available
	; or that the addressed device failed to acknowledge.


		; Send dummy write command to set internal address.
*/
		if(set_epaddr(data_addr) )return 1;
		
       	
	    return(read_current_24CXX(rd_buffer));
	
}

bit	read_block_24cxx(unsigned int data_addr,unsigned char * buffer,int count,uchar IICID)
{
		IICdevice_ID=IICID ;
	 	if(set_epaddr(data_addr) )return 1;
		

        if(start_24CXX())return 1;// abort if bus not available
		if(shout_24CXX(IICdevice_ID|READ_OP))
		{stop_24CXX();return 1;}	//; abort if no acknowledge
		do{
			*buffer++=shin_24CXX();//		; receive data byte
			
			if(count==1){
						  NAK_24CXX();
						  break;
						}
			ACK_24CXX();


		  }while(--count!=0);
		
		 stop_24CXX();
		 return 0;
	
}
bit write_byte_24CXX(unsigned int data_addr,unsigned char data_out)
{/*
	; AT24Cxx Byte Write function.
	; Called with programmable address in A, byte address in
	; register pair ADDR_HI:ADDR_LO, data in register XDATA.
	; Does not wait for write cycle to complete.
	; Returns CY set to indicate that the bus is not available
	; or that the addressed device failed to acknowledge.
	; Destroys A.
*/
	 	CLR_WP_24CXX;
		if(start_24CXX())return 1;// abort if bus not available

	      
		if(set_epaddr(data_addr) )return 1;

		if(shout_24CXX(data_out))
		{stop_24CXX();return 1;}//		; abort if no acknowledge
		
		stop_24CXX();
		DelayXms(MEM_BUSY_TIME);
		SET_WP_24CXX;
		return 0;
		
		
}
bit	write_block_24cxx(unsigned int data_addr,unsigned char * buffer,int count)
{

	 	if(set_epaddr(data_addr) )return 1;

        
		do{
			if(shout_24CXX(*buffer++))
			{stop_24CXX();return 1;}//		; abort if no acknowledge


		  }while(--count!=0);
		
		 stop_24CXX();
		 return 0;
	
}

void STORE_CONFIG(void )
{
	
}

bit RESTORE_SHANLING()
{
	 return 1;
}	

void RESTORE_CONFIG()
{
	


}	
	










/**************************************************/
/*
void ReadString(unsigned char data *RamAddress,unsigned char RomAddress,unsigned char Number) 
{
        while(Number!=0) {
                read_random_24CXX(RomAddress,RamAddress);
                RamAddress++;
                RomAddress++;
                Number--;
                
        }
}

void WriteString(unsigned char data *RamAddress,unsigned char RomAddress,unsigned char Number) {
        
        if(Number==0) return;
        
        while(Number!=0) {
                write_byte_24CXX(RomAddress,*RamAddress);
                RamAddress++;
                RomAddress++;
                Number--;
                DelayXms(MEM_BUSY_TIME);
        }
}





              
                  


#define           ST_POS_CONFIG			0x20
void STORE_CONFIG(void )
{
	
	
	write_byte_24CXX(ST_POS_SHANLING ,MY_LOGO);
	DelayXms(MEM_BUSY_TIME);
 	WriteString(&M_Volume,ST_POS_CONFIG,10);
	
	
}
*/

/*
void RESTORE_CONFIG()
{
	
 ReadString(&Volume,ST_POS_CONFIG,10) ;	
	
	
}	
*/