/*
 *  Copyright 1999 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 */
/*
 *  ======== volume.cmd ========
 *
 */


-l rts.lib
 
MEMORY
{
    PAGE 0: EPROG:      origin = 0x1400,        len = 0x7c00
            VECT:       origin = 0xff80,        len = 0x80

    PAGE 1: USERREGS:   origin = 0x60,          len = 0x1c
            BIOSREGS:   origin = 0x7c,          len = 0x4
            IDATA:      origin = 0x80,          len = 0x1380
            EDATA:      origin = 0x1400,        len = 0x8000
            EDATA1:     origin = 0x9400,        len = 0x4c00
}

SECTIONS
{
    .vectors: {} > VECT PAGE 0
    .sysregs: {} > BIOSREGS PAGE 1
    .trcinit: {} > EPROG PAGE 0
    .gblinit: {} > EPROG PAGE 0
    .bios:    {} > EPROG PAGE 0
     frt:     {} > EPROG PAGE 0
    .text:    {} > EPROG PAGE 0
    .cinit:   {} > EPROG PAGE 0
    .pinit:   {} > EPROG PAGE 0
    .sysinit: {} > EPROG PAGE 0
    .bss:     {} > IDATA PAGE 1
    .far:     {} > IDATA PAGE 1
    .const:   {} > IDATA PAGE 1
    .switch:  {} > IDATA PAGE 1
    .sysmem:  {} > IDATA PAGE 1
    .cio:     {} > IDATA PAGE 1
    .MEM$obj: {} > IDATA PAGE 1
    .sysheap: {} > IDATA PAGE 1
}