<?xml version="1.0" encoding="UTF-8" standalone="yes"?><system name="count10">    <parameter valueString="-2115312362" name="systemHash"/>    <parameter valueString="1195526803950" name="timeStamp"/>    <parameter valueString="false" name="generateLegacySDK"/>    <parameter name="bonusData">bonusData 
{
   element clk
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
   }
}
</parameter>    <parameter valueString="false" name="hardcopyCompatible"/>    <parameter valueString="STRATIXII" name="deviceFamily"/>    <parameter valueString="false" name="generateLegacySim"/>    <parameter valueString="VERILOG" name="hdlLanguage"/>    <module version="7.1" name="clk" kind="clock_source">        <parameter valueString="true" name="clockFrequencyKnown"/>        <parameter valueString="1000000" name="clockFrequency"/>    </module></system>