?? xkcon.vhd
字號(hào):
----------------文件信息--------------------------------------------------------------------------------
--文 件 名: xkcon.vhd(相控充電機(jī)控制板)
--創(chuàng) 建 人: 劉寶貴
--最后修改日期: 2005年11月17日
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--功 能 描 述: 本程序?yàn)橄嗫爻潆姍C(jī)控制板上的CPLD內(nèi)的程序，完成如下功能1.鍵盤掃描2.控制AD轉(zhuǎn)換3.產(chǎn)生PWM信號(hào)
-- 與51系列CPU接口，接在51地址數(shù)據(jù)總線上，51單片機(jī)通過(guò)訪問(wèn)地址總線上的數(shù)據(jù)寄存器來(lái)控制CPLD
-- -----------------------------------------------------------------------------------------
-- |地址 | 讀 | 寫(xiě) |
-- -----------------------------------------------------------------------------------------
-- |10000000 |AD轉(zhuǎn)換低8位值 |寫(xiě)PA口,低三位有一位為1則begin_ad = '1' |
-- -----------------------------------------------------------------------------------------
-- |10000001 |AD轉(zhuǎn)換高5位值最高位為1則數(shù)據(jù)無(wú)效 |寫(xiě)PB口，液晶的數(shù)據(jù)總線 |
-- -----------------------------------------------------------------------------------------
-- |10000010 |按鍵值，大于15為無(wú)效按鍵 |寫(xiě)PWM低8位 |
-- -----------------------------------------------------------------------------------------
-- |10000011 |無(wú)效 |寫(xiě)PWM高4位 |
-- -----------------------------------------------------------------------------------------
-- |10000100 |無(wú)效 |寫(xiě)PE口，0:液晶被光制線，其它備用 |
---------------------------------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity xkcon is
port(
reset: in std_logic;------------------------單片機(jī)的復(fù)位引腳，為1時(shí)PWM輸出最小值
clk8mhz:in std_logic;------------------------時(shí)鐘輸入
ale: in std_logic;------------------------單片機(jī)的地址鎖存信號(hào)
rd: in std_logic;------------------------單片機(jī)的寫(xiě)信號(hào)
wr: in std_logic;------------------------單片機(jī)的讀信號(hào)
databus:inout std_logic_vector (7 downto 0);----單片機(jī)的地址數(shù)據(jù)復(fù)用總線（P0口）
outpa: out std_logic_vector (7 downto 0);----CPLD擴(kuò)展的并行輸出口 0：VCCE1 1：VCCE3 2：VCCE2 3：422EN
----CPLD擴(kuò)展的并行輸出口 4：REL1E 5：REL1E 6：REL1E 7：REL1E
outpb: out std_logic_vector (7 downto 0);----CPLD擴(kuò)展的并行輸出口 本項(xiàng)目做為液晶的數(shù)據(jù)總線
outpe: out std_logic_vector (5 downto 0);----CPLD擴(kuò)展的并行輸出口 0:液晶被光制線，其它備用
keyin: in std_logic_vector (3 downto 0);----鍵盤接口：接受掃描
keyout: out std_logic_vector (3 downto 0);----鍵盤接口：輸出掃描信號(hào)
cs12887:out std_logic;------------------------P0口輸出地址小于128時(shí)選中12887，大于128時(shí)選中CPLD
lcdcs1: in std_logic;------------------------本項(xiàng)目使用128X64液晶，該液晶兩條片選線互為反向用
lcdcs2: out std_logic;------------------------CPLD做反向器
a4052: out std_logic;------------------------隔離同相控制信號(hào)處理板的4052A引腳
b4052: out std_logic;------------------------隔離同相控制信號(hào)處理板的4052B引腳
adflag: in std_logic;------------------------信號(hào)處理板輸出，輸出0表示反向積分完成
pwm_pina:out std_logic;------------------------輸出PWM信號(hào)：'1...1'時(shí)輸出全為高電平'0...0'時(shí)輸出全為低電平
pwm_pinb:out std_logic;------------------------與pwm_pina反向
t200khz: out std_logic-------------------------200hz頻率輸出信號(hào)，供測(cè)試用
);
end xkcon;
architecture bhv of xkcon is
type st_type is(st0,st1,st2,st3,st4);-------------------AD轉(zhuǎn)換時(shí)所用的狀態(tài)機(jī)
signal c_st:st_type;
signal internal_bus_in :std_logic_vector(7 downto 0);---讀進(jìn)程所用總線緩沖
signal port_no:std_logic_vector(2 downto 0);------------CPLD內(nèi)部端口地址
signal count,pwm_count:std_logic_vector(11 downto 0);---count：當(dāng)前PWM計(jì)數(shù)值，pwm_count：?jiǎn)纹瑱C(jī)設(shè)定的PWM值
signal cs: std_logic;-----------------------------------單片機(jī)P0口輸出的地址總線最高位，1：選中CPLD，0：選中12887
signal clk2mhz:std_logic;-------------------------------2M時(shí)鐘，用于PWM計(jì)數(shù)脈沖
signal clk200khz:std_logic;-----------------------------200K時(shí)鐘，用于AD計(jì)數(shù)脈沖
signal begin_ad: std_logic;-----------------------------VCCE1或VCCE2或VCCE3的任意一位為高時(shí)begin_ad 變?yōu)?
signal count_ad:std_logic_vector(12 downto 0);----------AD轉(zhuǎn)換所用計(jì)數(shù)器，最高位為1時(shí)數(shù)據(jù)溢出無(wú)效
signal scan_cnt: std_logic_vector(3 downto 0);----------鍵盤掃描計(jì)數(shù)值
begin
-----------------------------------------------------------------------------------------------------
lcdcs2<= not lcdcs1;
cs12887<= cs;
t200khz<= clk200khz;
-----------------------------------------------------------------------------------------------------
--鍵盤掃描進(jìn)程
-----------------------------------------------------------------------------------------------------
scan_1:process(clk2mhz,clk200khz,key_pressed)
begin
if(clk2mhz'event and clk2mhz='1')then
if(clk200khz='1' and key_pressed = '1')then
scan_cnt<= scan_cnt+1;
end if;
end if;
end process;
keyout<="1110" when scan_cnt(3 downto 2) = "00" else
"1101" when scan_cnt(3 downto 2) = "01" else
"1011" when scan_cnt(3 downto 2) = "10" else
"0111";
key_pressed<=keyin(0)when scan_cnt(1 downto 0)= "00" else
keyin(1)when scan_cnt(1 downto 0)= "01" else
keyin(2)when scan_cnt(1 downto 0)= "10" else
keyin(3);
-----------------------------------------------------------------------------------------------------
--AD轉(zhuǎn)換進(jìn)程
-----------------------------------------------------------------------------------------------------
adconvert:process(clk200khz)
begin
if(clk200khz'event and clk200khz='1')then
case c_st is
when st0 =>----st0:等待AD轉(zhuǎn)換命令當(dāng)寫(xiě)PA口使VCCE1或VCCE2或VCCE3的某位為高時(shí)begin_ad 變?yōu)?轉(zhuǎn)為狀態(tài)2
a4052<='1';
b4052<='1';
if(begin_ad = '1')then
c_st <=st1;count_ad<=(others=>'0');
else
c_st <=st0;
end if;
when st1=>----st1:等待10ms，以使VCCE1或VCCE2或VCCE3信號(hào)穩(wěn)定
count_ad<=count_ad+1;
a4052<='1';
b4052<='1';
if(count_ad(11) = '1')then
c_st <=st2;
count_ad(11)<='0';
else
c_st <=st1;
end if;
when st2=>----對(duì)基準(zhǔn)源進(jìn)行正向積分20ms
count_ad<=count_ad+1;
a4052<='1';
b4052<='0';
if(count_ad(12) = '1' ) then
c_st <=st3;
count_ad(12)<='0';
else
c_st <=st2;
end if;
when st3=>----對(duì)被測(cè)信號(hào)進(jìn)行反向積分adflag為0時(shí)反向積分完成
a4052<='0';
b4052<='1';
if(adflag='0')then
c_st <=st4;
else
c_st <=st3;
count_ad<=count_ad+1;
else
c_st <=st4;
end if;
end if;
when st4=>----等待CPU把VCCE1和VCCE2和VCCE3變?yōu)榈? a4052<='1';
b4052<='1';
if(begin_ad = '0')then
c_st <=st0;
else
c_st <=st4;
end if;
when others =>----非正常狀態(tài)處理
c_st <= st0;
end case;
end if;
end process;
-----------------------------------------------------------------------------------------------------
--分頻器進(jìn)程：將8Mhz的外部時(shí)鐘分成2Mhz和200Khz的內(nèi)部使用的時(shí)種
-----------------------------------------------------------------------------------------------------
divider:process(clk8mhz)
variable count_divider:std_logic_vector(4 downto 0);
begin
if(clk8mhz'event and clk8mhz='0') then
if(count_divider<"10011")then
count_divider:= count_divider + 1;
else
count_divider:=(others=>'0');
clk200khz<= not clk200khz;
end if;
clk2mhz <= count_divider(1);
end if;
end process;
-----------------------------------------------------------------------------------------------------
--地址鎖存進(jìn)程
-----------------------------------------------------------------------------------------------------
latch_address:process(ale)
begin
if ale'event and ale='0' then
port_no<= databus(2 downto 0);
cs <= databus(7);
end if;
end process;
-----------------------------------------------------------------------------------------------------
--CPU讀進(jìn)程
-----------------------------------------------------------------------------------------------------
cpu_read:process(rd,cs)
begin
if(cs='1' and rd='0')then
if (port_no="000")then internal_bus_in<=count_ad(7 downto 0);
elsif(port_no="001")then internal_bus_in(4 downto 0)<=count_ad(12 downto 8);
internal_bus_in(7 downto 5)<="000";
elsif(port_no="010")then internal_bus_in(3 downto 0)<=scan_cnt;
internal_bus_in(4)<=key_pressed;
internal_bus_in(7 downto 5)<="000";
else internal_bus_in<="ZZZZZZZZ";
end if;
else internal_bus_in<="ZZZZZZZZ";
end if;
databus<=internal_bus_in;
end process;
-----------------------------------------------------------------------------------------------------
--CPU寫(xiě)進(jìn)程
-----------------------------------------------------------------------------------------------------
cpu_write:process(wr)
begin
if(wr'event and wr ='1')then
if (port_no="000" and cs='1')then outpa<=databus;
if( databus(0)='1' or databus(1)='1' or databus(2)='1' )then
begin_ad <= '1';
else
begin_ad <= '0';
end if;
elsif(port_no="001" and cs='1')then outpb<=databus;
elsif(port_no="010" and cs='1')then pwm_count( 7 downto 0)<=databus;
elsif(port_no="011" and cs='1')then pwm_count(11 downto 8)<=databus(3 downto 0);
elsif(port_no="100" and cs='1')then outpe(5 downto 0)<=databus(5 downto 0);
-- elsif(port_no="100" and cs='1')then outpe<=databus(6 downto 0);
end if;
end if;
end process;
-----------------------------------------------------------------------------------------------------
--PWM信號(hào)產(chǎn)生進(jìn)程
-----------------------------------------------------------------------------------------------------
pwm:process(clk2mhz)
begin
if(reset='0')then
if(clk2mhz'event and clk2mhz ='0')then
count<=count + 1;
if(count<pwm_count)then
pwm_pina <= '1';
pwm_pinb <= '0';
else
pwm_pina <= '0';
pwm_pinb <= '1';
end if;
end if;
else
pwm_pina <= '0';
pwm_pinb <= '1';
end if;
end process;
end bhv;?? 快捷鍵說(shuō)明
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