/************************************************
 * NAME	    : OPTION.H							*
 * BY       : HappyHd
 * Version  : 1.Sep.2006						*
 ***********************************************/
#ifndef __OPTION_H__
#define __OPTION_H__


#define MCLK (48000000)		 //系統(tǒng)主頻設(shè)定
#define PLLON 1              // 1 :PLL_ON  0 :PLL_OFF  Default=24Mhz

#if   (MCLK==24000000)       //Fin=10Mhz  Fpllo=(PLL_M+8)*Fin/(PLL_P+2)*2
	#define PLL_M (16)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==32000000)
	#define PLL_M (24)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==40000000)
	#define PLL_M (32)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==48000000)
	#define PLL_M (40)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==56000000)
	#define PLL_M (48)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==60000000)
	#define PLL_M (52)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==64000000)
	#define PLL_M (56)
	#define PLL_P (3)
	#define PLL_S (1)

#elif (MCLK==66000000)
	#define PLL_M (58)
	#define PLL_P (3)
	#define PLL_S (1)
#endif

#define WRBUFOPT (0x8)   //寫緩沖使能（Enabel write buffer operation）

#define SYSCFG_0KB (0x0|WRBUFOPT)		//遲延無效，數(shù)據(jù)異常結(jié)束有效
#define SYSCFG_4KB (0x2|WRBUFOPT)		//遲延無效，數(shù)據(jù)異常結(jié)束有效
#define SYSCFG_8KB (0x6|WRBUFOPT)		//遲延無效，數(shù)據(jù)異常結(jié)束有效

//#define DRAM	    1		//In case DRAM is used
#define SDRAM	    2		//In case SDRAM is used
#define BDRAMTYPE   SDRAM	//used in power.c,44blib.c

//BUSWIDTH; 16,32
#define BUSWIDTH    (16)

#define CACHECFG    SYSCFG_8KB

#define _RAM_STARTADDRESS 0x0c000000
//08M字節(jié) SDRAM:0x0c000000-0x0c7fffff

#define _ISR_STARTADDRESS 0xc7fff00     //GCS6:64M bits(8M字節(jié)) DRAM/SDRAM

#define Non_Cache_Start	(0x2000000)
#define Non_Cache_End 	(0xc000000)

#endif /*__OPTION_H__*/