?? top.rpt
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Project Information e:\4_monday\top.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 04/10/2006 21:07:15
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Memory Memory LCs
POF Device Pins Pins Pins Bits % Utilized LCs % Utilized
top EP1K30TC144-1 4 58 0 0 0 % 292 16 %
User Pins: 4 58 0
Project Information e:\4_monday\top.rpt
** PROJECT COMPILATION MESSAGES **
Warning: Node '10' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node '11' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node 'out_branch0' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node 'out_branch1' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node 'out_main0' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node 'out_main1' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node 'PIN_NAME' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Warning: Node '|102|RED3' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Project Information e:\4_monday\top.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
top@121 A
top@117 B
top@132 C
top@55 CLKIN
top@126 CLR
top@119 D
top@128 dot
top@112 E
top@131 F
top@110 GG
top@88 G1
top@114 G2
top@98 G3
top@90 G4
top@87 G5
top@89 G6
top@95 G7
top@99 G8
top@36 G9
top@33 G10
top@29 G11
top@31 G12
top@30 G13
top@63 G14
top@68 G15
top@73 G16
top@67 KEY
top@111 maingreen
top@120 mainred
top@116 mainyellow
top@137 --------- out_branch0
top@142 --------- out_branch1
top@140 --------- out_main0
top@133 --------- out_main1
top@138 out0
top@141 out1
top@142 out2
top@136 out3
top@140 out4
top@133 out5
top@125 --------- PIN_NAME
top@125 pin125
top@60 ROW3
top@48 ROW4
top@46 ROW5
top@43 ROW6
top@41 ROW7
top@38 ROW8
top@51 RO1
top@59 RO2
top@80 R1
top@100 R2
top@102 R3
top@96 R4
top@83 R5
top@91 R6
top@97 R7
top@101 R8
top@32 R9
top@27 R10
top@65 R11
top@81 R12
top@28 R13
top@70 R14
top@79 R15
top@78 R16
top@130 4th
top@33 --------- 10
top@29 --------- 11
top --------- |102|RED3
Project Information e:\4_monday\top.rpt
** FILE HIERARCHY **
|counter_1:1|
|counter_1:1|lpm_counter:lpm_counter_component|
|counter_1:1|lpm_counter:lpm_counter_component|f8count:p8c2|
|counter_1:1|lpm_counter:lpm_counter_component|f8count:p8c1|
|counter_1:1|lpm_counter:lpm_counter_component|f8count:p8c0|
|count3:146|
|greenswitch:5|
|8segment:6|
|counter0:82|
|counter0:82|lpm_counter:lpm_counter_component|
|counter0:82|lpm_counter:lpm_counter_component|f8count:p8c0|
|mymain:104|
|mygreenswitch:129|
|mygreenswitch:130|
|modifier:132|
|timedisplayer:136|
|digselector:138|
|myexpand:141|
|mycount3:150|
|count3600s:151|
Device-Specific Information: e:\4_monday\top.rpt
top
***** Logic for device 'top' compiled without errors.
Device: EP1K30TC144-1
ACEX 1K Configuration Scheme: Passive Serial
Device Options:
User-Supplied Start-Up Clock = OFF
Auto-Restart Configuration on Frame Error = OFF
Release Clears Before Tri-States = OFF
Enable Chip_Wide Reset = OFF
Enable Chip-Wide Output Enable = OFF
Enable INIT_DONE Output = OFF
JTAG User Code = 7f
MultiVolt I/O = OFF
Enable Lock Output = OFF
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