----------------------------------------------------------------------------  Copyright (C) 1998-1999, Annapolis Micro Systems, Inc.--  All Rights Reserved.------------------------------------------------------------------------------------------------------------------------------------------------------  Model Technology ModelSim(tm) Compilation Macro File----  Follow the itemized instructions below in order to customize--  the STARFIRE(tm) simulation model compilation script to meet--  your application needs.----  To execute this macro file from the ModelSim(tm) VHDL simulator:----    Using the "File->Execute Macro" menu option select this --    file in the browser window and click on "Open".------------------------------------------------------------------------------------------------------------------------------------------------------  1. Change the PROJECT_BASE and STARFIRE_BASE variables to your--     project directory and STARFIRE(tm)/VME installation directory,--     respectively:----------------------------------------------------------------------------set PROJECT_BASE c:/wildstar/VHDL/starfire/examples/mem_copy/vhdl/sim--set STARFIRE_BASE c:/wildstar/VHDL/starfireset PROJECT_BASE ./set STARFIRE_BASE ../../../../STARFIRE/vhdl/starfirevlib armvmap arm armvlog -work arm $PROJECT_BASE/pardef.vvlog -work arm $PROJECT_BASE/alu.vvlog -work arm $PROJECT_BASE/align.vvlog -work arm $PROJECT_BASE/arm9.vvlog -work arm $PROJECT_BASE/comp42_2.vvlog -work arm $PROJECT_BASE/comp42_n40.vvlog -work arm $PROJECT_BASE/comp42_n64.vvlog -work arm $PROJECT_BASE/control.vvlog -work arm $PROJECT_BASE/counters.vvlog -work arm $PROJECT_BASE/dcache.vvlog -work arm $PROJECT_BASE/decode.vvlog -work arm $PROJECT_BASE/ex.vvlog -work arm $PROJECT_BASE/icache.vvlog -work arm $PROJECT_BASE/id.vvlog -work arm $PROJECT_BASE/ifetch.vvlog -work arm $PROJECT_BASE/interlock.vvlog -work arm $PROJECT_BASE/mapreg.vvlog -work arm $PROJECT_BASE/mapspsr.vvlog -work arm $PROJECT_BASE/me.vvlog -work arm $PROJECT_BASE/miniram.vvlog -work arm $PROJECT_BASE/mmu_new.vvlog -work arm $PROJECT_BASE/mult.vvlog -work arm $PROJECT_BASE/multacc.vvlog -work arm $PROJECT_BASE/pipe.vvlog -work arm $PROJECT_BASE/ppselect.vvlog -work arm $PROJECT_BASE/ram1p.vvlog -work arm $PROJECT_BASE/ram2p.vvlog -work arm $PROJECT_BASE/itag.vvlog -work arm $PROJECT_BASE/dtag.vvlog -work arm $PROJECT_BASE/regfile.vvlog -work arm $PROJECT_BASE/shifter.vvlog -work arm $PROJECT_BASE/tag.v----  Do not change these two lines!!--cd $PROJECT_BASEdo $STARFIRE_BASE/src/system_vcom.do--Adding this Line to place the RAMB_256xxx_DP cells into the arm libraryvcom -93 -explicit -work arm $STARFIRE_BASE/src/xilinx/xilinx_entarch.vhd----------------------------------------------------------------------------  2. If you are using a specific mezzanine card (e.g., a mezzanine--     memory card) or a specific I/O card (e.g., a FPDP I/O card)--     add the appropriate macro execution and/or compilation --     statement(s) here:------------------------------------------------------------------------------   If you are using the mezzanine memory card, you should uncomment --   and/or modify the following 2 lines:--do $STARFIRE_BASE/src/mezz_card/mezz_mem_card/mezz_mem_card_vcom.dovcom -93 -explicit -work system $PROJECT_BASE/mezz_mem_card_cfg.vhd----------------------------------------------------------------------------  3. Add your project's PE1 architecture VHDL file here, as --     well as any VHDL files on which your PE1 design depends:--------------------------------------------------------------------------vcom -93 -explicit -work PEX_Lib $PROJECT_BASE/pe_lad2mem_if_entarch.vhdvcom -93 -explicit -work PEX_Lib $PROJECT_BASE/pe_arm2mem_if_entarch.vhdvcom -93 -explicit -work PEX_Lib $PROJECT_BASE/pex.vhd----------------------------------------------------------------------------  4. Add your project's host architecture VHDL file here, as --     well as any VHDL files on which your host design depends:--------------------------------------------------------------------------vcom -93 -explicit -work system $PROJECT_BASE/host.vhd----------------------------------------------------------------------------  5. Add your project's system configuration VHDL file here:--------------------------------------------------------------------------vcom -93 -explicit -work system $PROJECT_BASE/system_cfg.vhd