+//	call any other SIO routine after calling this routine.
+//	
+//----------------------------------------------------------------------
+void SIO_shutdown(void)
+{
+	if (g_initialized)
+	{
+		DPRINTF("\n");
+
+		// set the clock and data lines to a harmless state
+		SIOLL_output_clock(1);
+		SIOLL_output_data(1);
+
+		g_initialized = 0;
+	}
+
+	SIOLL_shutdown_smbus();
+}
+
+
+int SIO_read(unsigned char address, unsigned int reg, unsigned long *p_value, unsigned int bytes)
+{
+	int restart_count = 0;
+	unsigned int data;
+		  
+	//printf("SIO_READ, addr: %X, reg: %X\n", address, reg);
+	if (!p_value)
+		return ERR_INVALID_PARAMETER;
+
+	while (restart_count++ < 5)
+	{
+		*p_value = 0x0D0A;
+
+		// set the access pointer register.
+		// The address is shifted left by one to make room for Read/Write bit 
+		send_start();
+		send_data((char)((address << 1) | SIOWRITE));
+		if (!receive_ack())
+		{
+			DPRINTF("NACK received after component address.\n");
+			send_stop();
+			OS_mdelay(10);
+			continue;
+		}
+		send_data((unsigned char)(reg & 0xFF));
+		send_nack();
+		
+		if (bytes >= 1)
+		{
+			// read the first data byte.
+			send_start();
+			send_data((char)((address << 1) | SIOREAD));
+			if (!receive_ack())
+			{
+				DPRINTF("NACK received after register.\n");
+				send_stop();
+				OS_mdelay(10);
+				continue;
+			}
+			*p_value = receive_data();
+		}
+
+		if (bytes >= 2)
+		{
+			// read the second byte.
+			send_ack();
+			data = receive_data();
+			*p_value |= (data << 8);
+		}	
+
+		if (bytes >= 3)
+		{
+			// read the third byte.
+			send_ack();
+			data = receive_data();
+			*p_value |= (data << 16);
+		}	
+
+		if (bytes >= 4)
+		{
+			// read the fourth byte.
+			send_ack();
+			data = receive_data();
+			*p_value |= (data << 24);
+		}	
+
+		if (bytes > 4)
+		{
+			DPRINTF("requested more than 4 bytes!\n");
+		}
+
+		// done.
+		send_nack();
+		send_stop();
+
+//		TRACE(("SIO_read(0x%x,0x%x,0x%lx,%u)\n",address,reg,*p_value,bytes))
+		
+		return 0;
+	}
+
+	DPRINTF("(0x%x) failed, too many NACKs.\n",reg);
+
+	return ERR_SIO_READ_FAILED;
+}
+
+int SIO_read_current_offset(unsigned char address, unsigned long *p_value, unsigned int bytes)
+{
+	int restart_count = 0;
+	unsigned int data;
+	
+	if (!p_value)
+		return ERR_INVALID_PARAMETER;
+
+	while (restart_count++ < 5)
+	{
+		*p_value = 0x0D0A;
+
+		// The address is shifted left by one to make room for Read/Write bit 
+		
+		if (bytes >= 1)
+		{
+			// read the first data byte.
+			send_start();
+			send_data((char)((address << 1) | SIOREAD));
+			if (!receive_ack())
+			{
+				DPRINTF("NACK received after register.\n");
+				send_stop();
+				OS_mdelay(10);
+				continue;
+			}
+			*p_value = receive_data();
+		}
+
+		if (bytes >= 2)
+		{
+			// read the second byte.
+			send_ack();
+			data = receive_data();
+			*p_value |= (data << 8);
+		}	
+
+		if (bytes >= 3)
+		{
+			// read the third byte.
+			send_ack();
+			data = receive_data();
+			*p_value |= (data << 16);
+		}	
+
+		if (bytes >= 4)
+		{
+			// read the fourth byte.
+			send_ack();
+			data = receive_data();
+			*p_value |= (data << 24);
+		}	
+
+		if (bytes > 4)
+		{
+			DPRINTF("requested more than 4 bytes!\n");
+		}
+
+		// done.
+		send_nack();
+		send_stop();
+
+		return 0;
+	}
+
+	DPRINTF("failed, too many NACKs.\n");
+
+	return ERR_SIO_READ_FAILED;
+}
+
+int SIO_write(unsigned char address, unsigned int reg, unsigned long value, unsigned int bytes)
+{
+	int restart_count = 0;
+
+	while (restart_count++ < 5)
+	{
+		// set the access pointer register.
+		// The address is shifted left by one to make room for Read/Write bit 
+		send_start();
+		send_data((char)((address << 1) | SIOWRITE));
+		if (!receive_ack())
+		{
+			DPRINTF("NACK received after component address.\n");
+			send_stop();
+			OS_mdelay(10);
+			continue;
+		}
+		send_data((unsigned char)reg);
+		if (!receive_ack())
+		{
+			DPRINTF("NACK received after register.\n");
+			send_stop();
+			OS_mdelay(10);
+			continue;
+		}
+
+		if (bytes >= 1)
+		{
+			// write the first byte.
+			send_data((unsigned char)value);
+			if (!receive_ack())
+			{
+				DPRINTF("NACK received after first data byte.\n");
+				send_stop();
+				OS_mdelay(10);
+				continue;
+			}
+		}
+
+		if (bytes >= 2)
+		{
+			// write the second byte.
+			send_data((unsigned char)(value >> 8));
+			if (!receive_ack())
+			{
+				DPRINTF("NACK received after second data byte.\n");
+				send_stop();
+				OS_mdelay(10);
+				continue;
+			}
+		}
+
+		if (bytes >= 3)
+		{
+			// write the third byte.
+			send_data((unsigned char)(value >> 16));
+			if (!receive_ack())
+			{
+				DPRINTF("NACK received after second data byte.\n");
+				send_stop();
+				OS_mdelay(10);
+				continue;
+			}
+		}
+
+		if (bytes >= 4)
+		{
+			// write the fourth byte.
+			send_data((unsigned char)(value >> 24));
+			if (!receive_ack())
+			{
+				DPRINTF("NACK received after second data byte.\n");
+				send_stop();
+				OS_mdelay(10);
+				continue;
+			}
+		}
+
+		if (bytes > 4)
+		{
+			DPRINTF("requested more than 4 bytes!\n");
+		}
+
+		// done.
+		send_stop();
+
+//		TRACE(("SIO_write(0x%x,0x%x,0x%lx,%u)\n",address,reg,value,bytes))
+
+		unsigned long data = 0;
+		SIO_read(address, reg, &data, bytes);
+		
+		if(data != value)
+		{
+			OS_printf("FOCUS Data integrity check failed!\n");	
+			OS_printf("FOCUS Reg 0x%02X = 0x%08X, Wrote: 0x%08X\n", reg, (uint32) data, (uint32) value);					
+			return ERR_SIO_WRITE_FAILED;
+		}
+		else
+		{
+			#ifdef _DEBUG
+				//OS_printf("FOCUS Register 0x%02X = 0x%08X\n", reg, (uint32) data);
+			#endif			
+		}
+		
+		//OS_mdelay(100);
+		return 0;
+	}
+
+	DPRINTF("(0x%x) failed, too many NACKs.\n",reg);
+
+	return ERR_SIO_WRITE_FAILED;
+}
+
diff -Naur linux26-cvs/drivers/video/focus/sio.h linux26-fs4553/drivers/video/focus/sio.h--- linux26-cvs/drivers/video/focus/sio.h	1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/drivers/video/focus/sio.h	2005-08-09 14:40:13.000000000 -0500@@ -0,0 +1,21 @@+//	SIO.h
+
+// Copyright (c) 1999-2000, FOCUS Enhancements, Inc., All Rights Reserved.
+
+//	This file defines the high-level SIO interface.  It provides functions
+//	that can be used from other modules to read or write an SIO device.
+
+
+#ifndef	__SIO_H__
+#define	__SIO_H__
+
+int SIO_init(void);
+void SIO_shutdown(void);
+
+int SIO_read(unsigned char address, unsigned int reg, unsigned long *p_value, unsigned int bytes);
+int SIO_read_current_offset(unsigned char address, unsigned long *p_value, unsigned int bytes);
+
+int SIO_write(unsigned char address, unsigned int reg, unsigned long value, unsigned int bytes);
+
+#endif
+
diff -Naur linux26-cvs/drivers/video/focus/sioll_au1xxx.c linux26-fs4553/drivers/video/focus/sioll_au1xxx.c--- linux26-cvs/drivers/video/focus/sioll_au1xxx.c	1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/drivers/video/focus/sioll_au1xxx.c	2005-08-09 14:40:13.000000000 -0500@@ -0,0 +1,100 @@+#include "os.h"
+#include "sioll.h"
+
+#if defined(AU1200)
+	#define GPIO_DATA	18
+	#define GPIO_CLOCK	25
+#elif defined(AU1100)
+	//#define GPIO_DATA	22
+	//#define GPIO_CLOCK	4
+	#define GPIO_DATA	4
+	#define GPIO_CLOCK	1
+#endif
+
+int SIOLL_init_focus(void)
+{	
+	#if defined(PB1100) | defined(DB1200)
+		bcsr->resets |= BCSR_RESETS_TV;
+		au_sync();
+		bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
+		au_sync();
+
+	#elif defined(FICMMP)
+		OS_set_config_bits(FICMMP_CONFIG_TVOUTPWREN);	//Enable Focus power
+		OS_clear_config_bits(FICMMP_CONFIG_TVODATAOUT);	//Enable data buffers
+		//Reset Focus part
+		OS_gpio_write(FICMMP_FOCUS_RST, 0);
+		OS_mdelay(100);
+		OS_gpio_write(FICMMP_FOCUS_RST, 1);
+		OS_mdelay(100);
+	#endif
+			
+	#if defined(AU1200)
+		OS_gpio_tristate(3);	//Set GP3 to input for external lcd clock
+	#endif
+	
+	return 0;
+}
+
+void SIOLL_shutdown_focus(void)
+{
+	#if defined(FICMMP)
+		OS_gpio_tristate(FICMMP_FOCUS_RST);						//Put Focus part in to reset (pull down)
+		OS_set_config_bits(FICMMP_CONFIG_TVODATAOUT);	//Disable data buffers
+		OS_clear_config_bits(FICMMP_CONFIG_TVOUTPWREN);	//Disable Focus power
+	#endif	
+}
+
+int SIOLL_init_smbus(void)
+{	
+	#if defined(AU1200)
+		sys->pinfunc |= SYS_PINFUNC_P0B;	//Enable GPIO25 & GPIO18 instead of PSC0
+	#endif
+	
+	OS_gpio_set_inputs();
+
+	return 0;
+}
+
+void SIOLL_shutdown_smbus(void)
+{
+	#if defined(AU1200)
+		sys->pinfunc &= ~SYS_PINFUNC_P0B;	//Enable PSC0
+	#endif
+}
+
+void SIOLL_output_clock(int value)
+{
+	OS_gpio_write(GPIO_CLOCK, value);
+	OS_udelay(5);		//These pullups are pretty weak, allow time to reach 3.3V
+	//msdelay(1);
+}
+
+void SIOLL_output_data(int value)
+{
+	if(value)
+		OS_gpio_tristate(GPIO_DATA);		//Let the pullup drive the logic '1'
+	else
+		OS_gpio_write(GPIO_DATA, value);
+	
+	OS_udelay(5);		//These pullups are pretty weak, allow time to reach 3.3V
+}
+
+int SIOLL_input_data(void)
+{
+	return OS_gpio_read(GPIO_DATA);
+}
+
+void SIOLL_set_data_for_output(void)
+{
+	//This functionality is accomplished when a write occurs
+}
+
+void SIOLL_set_data_for_input(void)
+{
+	OS_gpio_tristate(GPIO_DATA);
+	OS_udelay(5);
+	//gpio_input_enable(GPIO_DATA);
+}
+
+
diff -Naur linux26-cvs/drivers/video/focus/sioll.h linux26-fs4553/drivers/video/focus/sioll.h--- linux26-cvs/drivers/video/focus/sioll.h	1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/drivers/video/focus/sioll.h	2005-08-09 14:40:13.000000000 -0500@@ -0,0 +1,21 @@+
+
+#ifndef SIOLL_H
+#define SIOLL_H
+
+int SIOLL_init_focus(void);
+int SIOLL_init_smbus(void);
+void SIOLL_shutdown_focus(void);
+void SIOLL_shutdown_smbus(void);
+void SIOLL_output_clock(int value);
+void SIOLL_set_data_for_output(void);
+void SIOLL_output_data(int value);
+int SIOLL_input_data(void);
+void SIOLL_set_data_for_input(void);
+
+#define ERR_INVALID_PARAMETER	1
+#define ERR_SIO_READ_FAILED		2
+#define ERR_SIO_WRITE_FAILED	3
+
+
+#endif //SIOLL_H
diff -Naur linux26-cvs/drivers/video/Kconfig linux26-fs4553/drivers/video/Kconfig--- linux26-cvs/drivers/video/Kconfig	2005-08-12 13:39:21.739347776 -0500+++ linux26-fs4553/drivers/video/Kconfig	2005-08-09 14:40:13.000000000 -0500@@ -959,6 +959,10 @@ 	bool "Au1200 LCD Driver" 	depends on FB && MIPS && SOC_AU1200 +config FOCUS_ENHANCEMENTS+	bool "Focus Enhancements FS453/454/455/456 NTSC-PAL Encoder"+	depends on FB_AU1200+ config FB_SBUS 	bool "SBUS and UPA framebuffers" 	depends on FB && (SPARC32 || SPARC64)diff -Naur linux26-cvs/drivers/video/Makefile linux26-fs4553/drivers/video/Makefile--- linux26-cvs/drivers/video/Makefile	2005-08-12 13:39:21.739347776 -0500+++ linux26-fs4553/drivers/video/Makefile	2005-08-09 14:40:13.000000000 -0500@@ -98,7 +98,7 @@ obj-$(CONFIG_FB_TX3912)		  += tx3912fb.o  cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_AU1100)		  += au1100fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_AU1200)		  += au1200fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o-+obj-$(CONFIG_FOCUS_ENHANCEMENTS) += focus/  # Platform or fallback drivers go here obj-$(CONFIG_FB_VESA)             += vesafb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.odiff -Naur linux26-cvs/include/asm-mips/mach-au1x00/au1xxx_gpio.h linux26-fs4553/include/asm-mips/mach-au1x00/au1xxx_gpio.h--- linux26-cvs/include/asm-mips/mach-au1x00/au1xxx_gpio.h	1969-12-31 18:00:00.000000000 -0600+++ linux26-fs4553/include/asm-mips/mach-au1x00/au1xxx_gpio.h	2005-08-09 14:40:37.000000000 -0500@@ -0,0 +1,20 @@+#ifndef __AU1XXX_GPIO_H
+#define __AU1XXX_GPIO_H
+
+void au1xxx_gpio1_set_inputs(void);
+void au1xxx_gpio_tristate(int signal);
+void au1xxx_gpio_write(int signal, int value);
+int  au1xxx_gpio_read(int signal);
+
+typedef volatile struct
+{
+	u32 dir;
+	u32 reserved;
+	u32 output;
+	u32 pinstate;
+	u32 inten;
+	u32 enable;
+
+} AU1X00_GPIO2;
+
+#endif //__AU1XXX_GPIO_H