This patch provides support for the Au1200 AES Block.This patch authored against Linux 2.4.26.How to use AES feature with the Au1200 and LinuxMay 16, 2005 (Header file only)diff -rwbupN -x CVS linux/include/asm-mips/mach-au1x00/au1xxx_aes.h linux-vlim/include/asm-mips/mach-au1x00/au1xxx_aes.h--- linux/include/asm-mips/mach-au1x00/au1xxx_aes.h        1969-12-31 18:00:00.000000000 -0600+++ linux-vlim/include/asm-mips/mach-au1x00/au1xxx_aes.h        2005-01-30 14:55:37.000000000 -0600@@ -0,0 +1,157 @@+/*+ *        API to Alchemy AES+ *+ * Copyright 2005 AMD+ *+ *  This program is free software; you can redistribute  it and/or modify it+ *  under  the terms of  the GNU General  Public License as published by the+ *  Free Software Foundation;  either version 2 of the  License, or (at your+ *  option) any later version.+ *+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.+ *+ *  You should have received a copy of the  GNU General Public License along+ *  with this program; if not, write  to the Free Software Foundation, Inc.,+ *  675 Mass Ave, Cambridge, MA 02139, USA.+ */++#ifndef __AU1XXX_AES_H+#define __AU1XXX_AES_H++/*+################################################################################################+#####                         AES Block Register Definitions                               #####+################################################################################################+*/+#define AES_STATUS                         0x0000+#define AES_INDATA                         0x0004+#define AES_OUTDATA                        0x0008+#define AES_INTCAUSE                       0x000C+#define AES_CONFIG                         0x0010++/* BASIC DATA TYPES */+typedef unsigned long uint32;++#ifndef ASSEMBLER+typedef volatile struct+{+        uint32         status;                /* 0x00 */+        uint32         indata;                /* 0x04 */+        uint32         outdata;               /* 0x08 */+        uint32         intcause;              /* 0x0C */+        uint32         config;                /* 0x10 */+} AU1200_AES;+#endif++/* AES Registers Defines */+#define AES_STATUS_PS                (1<<0)                /* AES Process start/stop */+#define AES_STATUS_IE                (1<<1)                /* Interrupt Enable */+#define AES_STATUS_CR_N(n)           ((n&0x03)<<2)         /* clock divider */+#define AES_STATUS_OUT               (1<<4)                /* TX request */+#define AES_STATUS_IN                (1<<5)                /* RX request */++#define AES_INT_RDY                  (1<<0)                /* En/Decryption Completion */+#define AES_INT_OVR                  (1<<1)                /* RX error */+#define AES_INT_UND                  (1<<2)                /* TX error */++#define AES_CONFIG_ED                (1<<0)                /* En/Decryption Select */+#define AES_CONFIG_IKG               (1<<1)                /* Internal Key Generation */+#define AES_CONFIG_RPK               (1<<2)                /* Software Replay Key */+#define AES_CONFIG_RK                (1<<3)                /* Internal reuse key */+#define AES_CONFIG_UC                (1<<4)                /* Undefined block count */+#define AES_CONFIG_OP_N(n)           ((n&0x03)<<5)         /* Mode of operation */++#ifndef AES_PHYS_ADDR+#define AES_PHYS_ADDR                0x10300000+#endif++#define SIZE_OF_AES_BUFFER           256*1024+#define NUM_OF_BYTES                     4+/*+* This AES_Input/Output_Structure is created to service+* Byte stream as input that is not in natural order as+* the processor, in this case for MIPS, is little endian+*+* All data type are involved except AES_Config and+* AES_Status cuz they are control registers that+* configured by setting the bits.+*+*/++typedef struct {+        uint32 AES_Config;+        uint32 AES_Status;+} AES_CONTROL;++typedef struct {+        unsigned char key0[NUM_OF_BYTES];+        unsigned char key1[NUM_OF_BYTES];+        unsigned char key2[NUM_OF_BYTES];+        unsigned char key3[NUM_OF_BYTES];+} AES_KEY;++typedef struct {+        unsigned char IV0[NUM_OF_BYTES];+        unsigned char IV1[NUM_OF_BYTES];+        unsigned char IV2[NUM_OF_BYTES];+        unsigned char IV3[NUM_OF_BYTES];+} AES_IV;++typedef struct {+        unsigned char RPK0[NUM_OF_BYTES];+        unsigned char RPK1[NUM_OF_BYTES];+        unsigned char RPK2[NUM_OF_BYTES];+        unsigned char RPK3[NUM_OF_BYTES];+} AES_RPK ;++#define SIZE_OF_RPK_KEY              sizeof(AES_RPK) /* replay key (4x4 bytes)*/+#define SIZE_OF_AES_CONTROL          sizeof(AES_RPK)++/*+        This padding is used to ensure the AES_Input data type+        size is similiar to AES_Output.++        The better approach is move the indata/outdata member+        to the beginning of the structure. Unfortunately,+        this break all the testcases for its assumption of+        the previous layout.+*/+typedef struct {+        uint32 pad0;+        uint32 pad1;+        uint32 pad2;+        uint32 pad3;+        uint32 pad4;+        uint32 pad5;+        uint32 pad6;+} AES_Unused;++typedef struct AES_Input_Struct+{+        AES_CONTROL ctrl;+        AES_KEY key;+        AES_IV IV;+        uint32        swap;+        unsigned char * indata;++} AES_Input;++typedef struct AES_Output_Struct+{++        AES_RPK RPK;+        AES_Unused Unused;+        unsigned char * outdata;++} AES_Output;++#endif /* __AU1XXX_AES_H */