/* mtxI2c.h - Motorola MTX I2C header file *//* Copyright 1984-1999 Wind River Systems, Inc. *//* Copyright 1998,1999 Motorola, Inc., All Rights Reserved *//*modification history--------------------01b,25feb99,dat  merge from motorola drop (SPR 25357)01a,12apr98,srr  converted to C from assembly language.*//*This file contains I2C I/O related defines and structure templates.*/#ifndef __INCmtxI2ch#define __INCmtxI2ch#ifdef __cplusplusextern "C" {#endif#define	I2C_DELAY	0x1000		/* small delay */#define I2C_ERROR_CHECK	TRUE		/* enable error checking *//* I2C control/status word definitions */#define	I2C_PIN_MASK	0x80		/* I2C Controller PIN bit */#define	I2C_LRB_MASK	0x08		/* I2C Controller LRB bit */#define	I2C_START_CMD	0x45		/* I2C Controller Start Command */#define	I2C_STOP_CMD	0x43		/* I2C Controller Start Command */#define	I2C_SERIAL_OFF	0x80		/* I2C serial interface off */#define	I2C_SERIAL_ON	0x40		/* I2C serial interface on */#define	I2C_OWN_ADDR	((UCHAR)~((UCHAR) 0xCA))  /* I2C effective own addr */#define	I2C_NW_SET_CLK	0xA0		/* I2C next write will set clk */#define	I2C_CLK_RATE	0x1C		/* I2C system clk=12MHz;SCL=90 kHz */#define	I2C_READ_BIT	0x01		/* I2C read bit */#define	I2C_BUS_BUSY	0x01		/* I2C bus busy bit */#define	I2C_ACK		0x40		/* I2C Acknowldege */#ifdef __cplusplus}#endif#endif /* __INCmtxI2ch */