/*
 *  Start of Zoran Standard Header
 *  Copyright (c) 2003 Zoran Corporation
 *  
 *  
 *  All rights reserved.  Proprietary and confidential.
 *  
 *  DESCRIPTION for usbhost.h
 *  	Include for usbhost.c
 *  
 *  NEW HISTORY COMMENT (description must be followed by a blank line)
 *  <Enter change description here>

 *  ===== HISTORY of changes in //depot/misc/projects/tps/usb/usbhost.h
 *  
 *  12/Jan/04 #35 JCogan, porting to the 4100 Reference platform.
 *                          Previous comments removed.
 *  
 *  
 *  
 *  End of Zoran Standard Header
 */
 
/*  Make sure to include the correct offset definitions
*/
#include "firereg6.h"
 
#ifndef USBHOST_INCLUDED
#define USBHOST_INCLUDED

#ifndef FALSE
#define FALSE ((Boolean)0)
#endif
#ifndef TRUE
#define TRUE ((Boolean)1)
#endif
#ifdef  NULL
#undef  NULL
#endif
#define NULL ((void *)0)

#ifndef MIN
#define MIN(a,b) ((a) < (b) ? (a) : (b))      
#endif

#ifdef DEBUG
#define USBH_ASSERT(_XX_) ASSERT(_XX_)
#else
#define USBH_ASSERT(_XX_)
#endif

#ifndef ASSERT
#define ASSERT(_XX_) { if (!(_XX_)) while (1) ; }
#endif

/* Interrupt bit position in MECRA, EXCLRA registers, (i.e., 1 << 1) */
#define USB1_INTERRUPT_BIT 0

/* register/memory access */
#define READ_BYTE(p)    (*(Uint8 *)(p))
#define WRITE_BYTE(p)   (*(Uint8 *)(p))


#define BDT_IN_BIT         (0x0)
#define BDT_OUT_BIT        (0x8)
#define BDT_ODD_EVEN_BIT   (0x4)

#define USB_SETUP_DEV2HOST (0x80)

/* Interrupt Status Register Bit Masks */
#define INTR_STALL      (0x80)
#define INTR_ATTACH     (0x40)
#define INTR_RSVD       (0x20)
#define INTR_SLEEP      (0x10)
#define INTR_TOK_DNE    (0x08)
#define INTR_SOF_TOK    (0x04)
#define INTR_ERROR      (0x02)
#define INTR_USB_RST    (0x01)

/* Control Register Bit Masks */
#define CTRL_USB_EN            (0x01)
#define CTRL_ODD_RST           (0x02)
#define CTRL_RESUME            (0x04)
#define CTRL_HOST_NO_SOF       (0x08)
#define CTRL_HOST_SOF          (0x09)  /*  HOST ENABLE | USB ENABLE */
#define CTRL_RESET             (0x10)
#define CTRL_TOKEN_BUSY        (0x20)
#define CTRL_TXD_SUSPEND       (0x20)
#define CTRL_SINGLE_END0       (0x40)
#define CTRL_JSTATE            (0x80)


/* Low Speed bit */
#define VUSB_ADDR_LS_EN         (0x80)

#define BDT_PID_MASKS           (0x3C)
#define BDT_INVALID_PID1        (0x18)
#define BDT_NAK_PID             (0x28)
#define BDT_STALL_PID           (0x38)
#define BDT_PID_OWN             (0x80)
#define BDT_PID_DATA01          (0x40)

/* Also define some useful bit combinations */
#define ENDPT_DISABLE           (0x00)
#define ENDPT_CNTL_0            (0x0d) /* retry disable|CtRxTx|Handshake */
#define ENDPT_BULK_RX           (0x49) /* retry disable|  Rx  |Handshake */
#define ENDPT_BULK_TX           (0x45) /* retry disable|    Tx|Handshake */
#define ENDPT_INT_RX            (0x49) /* retry disable|  Rx  |Handshake */
#define ENDPT_INT_TX            (0x45) /* not currently used */
#define ENDPT_INT_BIDIR         (0x4d) /* not currently used */
#define ENDPT_HOST_RETRY_DIS    (0x40) /* not currently used */
#define ENDPT_HOST_WO_HUB       (0x80) /* not currently used */

/* BYTE USB REGISTERS - base address: 0xE0480000 */
#define regINT_STAT ((volatile Uint8 *)USB10INTSTAT)  /* 00 Interrupt status  */
#define regINT_ENB  ((volatile Uint8 *)USB10INTENB)   /* 01 Interrupt enable  */
#define regERR_STAT ((volatile Uint8 *)USB10ERRSTAT)  /* 02 Error Int status  */
#define regERR_ENB  ((volatile Uint8 *)USB10ERRENB)   /* 03 Error int enable  */
#define regSTATUS   ((volatile Uint8 *)USB10STAT)     /* 04 Status            */
#define regCTL      ((volatile Uint8 *)USB10CTL)      /* 05 Control           */
#define regADDR     ((volatile Uint8 *)USB10ADDR)     /* 06 USB address       */
#define regFRM_NUML ((volatile Uint8 *)USB10FRMNUML)  /* 08 Frame no. - low   */
#define regFRM_NUMH ((volatile Uint8 *)USB10FRMNUMH)  /* 09 Frame no. - high  */
#define regTOKEN    ((volatile Uint8 *)USB10TOKEN)    /* 0A Token             */
#define regSOF_THLD ((volatile Uint8 *)USB10SOFTHLD)  /* 0B SOF threshold     */
#define regEP0CTL   ((volatile Uint8 *)USB10EP0CTL)   /* 10 EndPoint 0 cntrl  */
#define regBUFBASEL ((volatile Uint8 *)USB10BUFBASEL) /* 20 Buff base (23:16) */
#define regBUFBASEH ((volatile Uint8 *)(USB10BUFBASEL+1)) /* 21 Buff base (31:24) */

/* BOARD CONTROL REGISTER - Firestarter base address: 0xEE001002 */
#define regBCTRL_W  ((volatile Uint8 *)0xEE001002)
#define ENABLE_USB_PWR   *regBCTRL_W = *regBCTRL_W | 0x40;


/* USB CHAPTER 9 */

/* SETUP offsets */
#define bmRequestType   0
#define bRequest        1
#define wValue_low      2
#define wValue_high     3
#define wIndex_low      4
#define wIndex_high     5
#define wLength_low     6
#define wLength_high    7

/* bmRequestType */
#define DEVICE_TO_HOST        0x80
#define DEVICE_TO_HOST_IFACE  0x81
#define DEVICE_TO_HOST_EP     0x82

#define HOST_TO_DEVICE           0
#define HOST_TO_DEVICE_IFACE     1
#define HOST_TO_DEVICE_EP        2

/* bRequest types                 ReqType  wValue  wIndex  wLength   Data   */
#define GET_STATUS          0   /* dv/ep      0    0/if/ep    2      2bytes */
#define CLEAR_FEATURE       1   /* 02-ep   0-HALT     0       0      none   */
#define SET_FEATURE         3   /* 02-ep   feature 0/if/ep    0      none   */
#define SET_ADDRESS         5   /* 00        addr     0       0      none   */
#define GET_DESCRIPTOR      6   /* 80      type-inx langID   len     desc   */
#define SET_DESCRIPTOR      7   /* 00      type-inx langID   len     desc   */
#define GET_CONFIGURATION   8   /* 80         0       0       0      cnfg#  */
#define SET_CONFIGURATION   9   /* 00       cnfg#     0       0      none   */
#define GET_INTERFACE      10   /* 81         0      iface    1      altset */
#define SET_INTERFACE      11   /* 01       altset   iface    0      none   */

/* Descriptor types */
#define DEVICE_TYPE         1
#define CONFIGURATION_TYPE  2
#define STRING_TYPE         3
#define INTERFACE_TYPE      4
#define ENDPOINT_TYPE       5
#define HID_TYPE           33


/* Standard Device decriptors */

/* Device Descriptor */
typedef struct {
    Uint8 bLength;
    Uint8 bDescriptorType;
    Uint8 bcdUSB_low;
    Uint8 bcdUSB_high;
    Uint8 bDeviceClass;
    Uint8 bDeviceSubclass;
    Uint8 bDeviceProtocol;
    Uint8 bMaxPacketSize0;
    Uint8 idVendor_low;
    Uint8 idVendor_high;
    Uint8 idProduct_low;
    Uint8 idProduct_high;
    Uint8 bcdDevice_low;
    Uint8 bcdDevice_high;
    Uint8 bManufacturer;
    Uint8 bProduct;
    Uint8 iSerialNumber;
    Uint8 bNumConfigurations;
} DEVICE_DESC;

/* Configuration Descriptor */
typedef struct {
    Uint8 bLength;
    Uint8 bDescriptorType;
    Uint8 wTotalLength_low;
    Uint8 wTotalLength_high;
    Uint8 bNumInterfaces;
    Uint8 bConfigurationValue;
    Uint8 iConfiguration;
    Uint8 bmAttributes;
    Uint8 bMaxPower;
} CONFIG_DESC;

/* Interface Descriptor */
typedef struct {
    Uint8 bLength;
    Uint8 bDescriptorType;
    Uint8 bInterfaceNumber;
    Uint8 bAlternateSetting;
    Uint8 bNumEndpoints;
    Uint8 bInterfaceClass;
    Uint8 bInterfaceSubClass;
    Uint8 bInterfaceProtocol;
    Uint8 iInterface;
} INTERFACE_DESC;

/* Endpoint Descriptor */
typedef struct {
    Uint8 bLength;
    Uint8 bDescriptorType;
    Uint8 bEPAddress;
    Uint8 bmAttributes;
    Uint8 wMaxPacketSize_low;
    Uint8 wMaxPacketSize_high;
    Uint8 bInterval;
} ENDPOINT_DESC;

/* String[0] offsets */
#define BLENGTH             0
#define BDESCRIPTORTYPE     1
#define WLANGID0_LOW        2
#define WLANGID0_HIGH       3

/* UNICODE String offsets */
#define BLENGTH             0
#define BDESCRIPTORTYPE     1
#define BSTRING             2


/* usb_host.code values: */
#define USBH_NOCODE 0
#define USBH_ERROR  1
#define USBH_RESET  2
#define USBH_ATTACH 3
#define USBH_STALL  4
#define USBH_INTNAK 5
#define USBH_DONE   6
#define USBH_HCAN   7
#define USBH_NAK    8
#define USBH_OUT    9
#define USBH_IN    10
#define USBH_OUT0  11
#define USBH_IN0   12
#define USBH_INTR  13

#define NOT_READY 0     /* not ready */
#define MS_READY  1     /* mass storage device ready */
#define PB_READY  2     /* PictBridge device ready */


/* TD.state values: */
#define ISO_TRANSACTION 	0x10
#define INT_TRANSACTION 	0x20
#define CTRL_TRANSACTION 	0x40
#define BULK_TRANSACTION 	0x80

#define CNTRL_SETUP 1
#define PROCESS_IN  2
#define PROCESS_OUT 3
#define CNTRL_LAST  4
#define NO_REQUEST  5

#define DEVID_DEFAULT		0
#define DEVID_STILL_IMAGE	1
#define DEVID_MASS_STORAGE	2
#define DEVID_MAX			3

/* VUSB Buffer Descriptor Format */
typedef struct {
    Uint8 PID;      /* 7:own 6:data0/1 5-2:pid 1-0:bch bits */
    Uint8 BC;       /* Byte Count Low bits */
    Uint8 ADDRL;
    Uint8 ADDRH;
} BDT_STRUCT;

typedef struct {
    Uint8 pipe_type;
    Uint8 EP;
    Uint8 pksize;
    Uint8 type;
    Uint8 pid_ep;
    Uint8 DATAx;

    Uint8 *setup_bf;
    Uint8 *pipe_bf;

    Uint8 *io_bf;
    Uint32 length;
    Uint32 curr_count;
    Uint32 NAKcount;
    BDT_STRUCT *bdt;
} EP_DATA;
typedef struct {
	Uint8 ep_num;
	Uint8 addr;
	Uint32 *ep_list[16];
}DEV_INFO;

typedef struct trnsfer_struct{
	
	Uint32 *QH;
	struct trnsfer_struct	*TD_next;
	DEV_INFO 				*curr_DEV;
	EP_DATA					*curr_EP;
	
	Uint8 state;
    Uint8 *io_bf;
    Uint32 length;
    Uint32 finish_count;
    Uint32 NAKcount;
    /*BDT Setting Data*/
    Uint8 bdt_PID;      /* 7:own 6:data0/1 5-2:pid 1-0:bch bits */
    Uint8 bdt_BC;       /* Byte Count Low bits */
    Uint8 bdt_ADDRL;
    Uint8 bdt_ADDRH;
    BDT_STRUCT *bdt;
    /*Control Register Data*/
	Uint8 BUFBASEH;
	Uint8 BUFBASEL;
	Uint8 EP0CTL;
	Uint8 ADDR;
	Uint8 TOKEN;
} TRANSACTION_STRUCT;

struct queue_head{
	Uint32	TD_num;
	struct queue_head	*QH_next;
	
	TRANSACTION_STRUCT *TD_head;
	TRANSACTION_STRUCT *TD_tail;
};

typedef struct queue_head HOST_QUEUE_HEAD;

#endif /* USBHOST_INCLUDED*/