?? workonebeta.vo
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.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|rStartExsitFlag~regout ),
.cout(),
.cout0(),
.cout1());
// synopsys translate_off
defparam \MeasureU0|rStartExsitFlag .lut_mask = "0000";
defparam \MeasureU0|rStartExsitFlag .operation_mode = "normal";
defparam \MeasureU0|rStartExsitFlag .output_mode = "reg_only";
defparam \MeasureU0|rStartExsitFlag .register_cascade_mode = "off";
defparam \MeasureU0|rStartExsitFlag .sum_lutc_input = "datac";
defparam \MeasureU0|rStartExsitFlag .synch_mode = "off";
// synopsys translate_on
// atom is at LC_X9_Y4_N1
cyclone_lcell \MeasureU0|SystemClockDivider|Count[0] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [0] = DFFEAS(!\MeasureU0|SystemClockDivider|Count [0], GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[0]~323 = CARRY(\MeasureU0|SystemClockDivider|Count [0])
// \MeasureU0|SystemClockDivider|Count[0]~323COUT1 = CARRY(\MeasureU0|SystemClockDivider|Count [0])
.clk(\SysClock~combout ),
.dataa(\MeasureU0|SystemClockDivider|Count [0]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [0]),
.cout(),
.cout0(\MeasureU0|SystemClockDivider|Count[0]~323 ),
.cout1(\MeasureU0|SystemClockDivider|Count[0]~323COUT1 ));
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[0] .lut_mask = "55aa";
defparam \MeasureU0|SystemClockDivider|Count[0] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[0] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[0] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[0] .sum_lutc_input = "datac";
defparam \MeasureU0|SystemClockDivider|Count[0] .synch_mode = "on";
// synopsys translate_on
// atom is at LC_X9_Y4_N2
cyclone_lcell \MeasureU0|SystemClockDivider|Count[1] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [1] = DFFEAS(\MeasureU0|SystemClockDivider|Count [1] $ (\MeasureU0|SystemClockDivider|Count[0]~323 ), GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[1]~324 = CARRY(!\MeasureU0|SystemClockDivider|Count[0]~323 # !\MeasureU0|SystemClockDivider|Count [1])
// \MeasureU0|SystemClockDivider|Count[1]~324COUT1 = CARRY(!\MeasureU0|SystemClockDivider|Count[0]~323COUT1 # !\MeasureU0|SystemClockDivider|Count [1])
.clk(\SysClock~combout ),
.dataa(\MeasureU0|SystemClockDivider|Count [1]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(\MeasureU0|SystemClockDivider|Count[0]~323 ),
.cin1(\MeasureU0|SystemClockDivider|Count[0]~323COUT1 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [1]),
.cout(),
.cout0(\MeasureU0|SystemClockDivider|Count[1]~324 ),
.cout1(\MeasureU0|SystemClockDivider|Count[1]~324COUT1 ));
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[1] .cin0_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[1] .cin1_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[1] .lut_mask = "5a5f";
defparam \MeasureU0|SystemClockDivider|Count[1] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[1] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[1] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[1] .sum_lutc_input = "cin";
defparam \MeasureU0|SystemClockDivider|Count[1] .synch_mode = "on";
// synopsys translate_on
// atom is at LC_X9_Y4_N3
cyclone_lcell \MeasureU0|SystemClockDivider|Count[2] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [2] = DFFEAS(\MeasureU0|SystemClockDivider|Count [2] $ !\MeasureU0|SystemClockDivider|Count[1]~324 , GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[2]~325 = CARRY(\MeasureU0|SystemClockDivider|Count [2] & !\MeasureU0|SystemClockDivider|Count[1]~324 )
// \MeasureU0|SystemClockDivider|Count[2]~325COUT1 = CARRY(\MeasureU0|SystemClockDivider|Count [2] & !\MeasureU0|SystemClockDivider|Count[1]~324COUT1 )
.clk(\SysClock~combout ),
.dataa(vcc),
.datab(\MeasureU0|SystemClockDivider|Count [2]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(\MeasureU0|SystemClockDivider|Count[1]~324 ),
.cin1(\MeasureU0|SystemClockDivider|Count[1]~324COUT1 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [2]),
.cout(),
.cout0(\MeasureU0|SystemClockDivider|Count[2]~325 ),
.cout1(\MeasureU0|SystemClockDivider|Count[2]~325COUT1 ));
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[2] .cin0_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[2] .cin1_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[2] .lut_mask = "c30c";
defparam \MeasureU0|SystemClockDivider|Count[2] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[2] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[2] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[2] .sum_lutc_input = "cin";
defparam \MeasureU0|SystemClockDivider|Count[2] .synch_mode = "on";
// synopsys translate_on
// atom is at LC_X9_Y4_N4
cyclone_lcell \MeasureU0|SystemClockDivider|Count[3] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [3] = DFFEAS(\MeasureU0|SystemClockDivider|Count [3] $ \MeasureU0|SystemClockDivider|Count[2]~325 , GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[3]~326 = CARRY(!\MeasureU0|SystemClockDivider|Count[2]~325COUT1 # !\MeasureU0|SystemClockDivider|Count [3])
.clk(\SysClock~combout ),
.dataa(vcc),
.datab(\MeasureU0|SystemClockDivider|Count [3]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(gnd),
.cin0(\MeasureU0|SystemClockDivider|Count[2]~325 ),
.cin1(\MeasureU0|SystemClockDivider|Count[2]~325COUT1 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [3]),
.cout(\MeasureU0|SystemClockDivider|Count[3]~326 ),
.cout0(),
.cout1());
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[3] .cin0_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[3] .cin1_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[3] .lut_mask = "3c3f";
defparam \MeasureU0|SystemClockDivider|Count[3] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[3] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[3] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[3] .sum_lutc_input = "cin";
defparam \MeasureU0|SystemClockDivider|Count[3] .synch_mode = "on";
// synopsys translate_on
// atom is at LC_X9_Y4_N5
cyclone_lcell \MeasureU0|SystemClockDivider|Count[4] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [4] = DFFEAS(\MeasureU0|SystemClockDivider|Count [4] $ !\MeasureU0|SystemClockDivider|Count[3]~326 , GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[4]~327 = CARRY(\MeasureU0|SystemClockDivider|Count [4] & !\MeasureU0|SystemClockDivider|Count[3]~326 )
// \MeasureU0|SystemClockDivider|Count[4]~327COUT1 = CARRY(\MeasureU0|SystemClockDivider|Count [4] & !\MeasureU0|SystemClockDivider|Count[3]~326 )
.clk(\SysClock~combout ),
.dataa(vcc),
.datab(\MeasureU0|SystemClockDivider|Count [4]),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(\MeasureU0|SystemClockDivider|Count[3]~326 ),
.cin0(gnd),
.cin1(vcc),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [4]),
.cout(),
.cout0(\MeasureU0|SystemClockDivider|Count[4]~327 ),
.cout1(\MeasureU0|SystemClockDivider|Count[4]~327COUT1 ));
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[4] .cin_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[4] .lut_mask = "c30c";
defparam \MeasureU0|SystemClockDivider|Count[4] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[4] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[4] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[4] .sum_lutc_input = "cin";
defparam \MeasureU0|SystemClockDivider|Count[4] .synch_mode = "on";
// synopsys translate_on
// atom is at LC_X9_Y4_N6
cyclone_lcell \MeasureU0|SystemClockDivider|Count[5] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [5] = DFFEAS(\MeasureU0|SystemClockDivider|Count [5] $ ((!\MeasureU0|SystemClockDivider|Count[3]~326 & \MeasureU0|SystemClockDivider|Count[4]~327 ) # (\MeasureU0|SystemClockDivider|Count[3]~326 &
// \MeasureU0|SystemClockDivider|Count[4]~327COUT1 )), GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[5]~328 = CARRY(!\MeasureU0|SystemClockDivider|Count[4]~327 # !\MeasureU0|SystemClockDivider|Count [5])
// \MeasureU0|SystemClockDivider|Count[5]~328COUT1 = CARRY(!\MeasureU0|SystemClockDivider|Count[4]~327COUT1 # !\MeasureU0|SystemClockDivider|Count [5])
.clk(\SysClock~combout ),
.dataa(\MeasureU0|SystemClockDivider|Count [5]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(\MeasureU0|SystemClockDivider|Count[3]~326 ),
.cin0(\MeasureU0|SystemClockDivider|Count[4]~327 ),
.cin1(\MeasureU0|SystemClockDivider|Count[4]~327COUT1 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [5]),
.cout(),
.cout0(\MeasureU0|SystemClockDivider|Count[5]~328 ),
.cout1(\MeasureU0|SystemClockDivider|Count[5]~328COUT1 ));
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[5] .cin0_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[5] .cin1_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[5] .cin_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[5] .lut_mask = "5a5f";
defparam \MeasureU0|SystemClockDivider|Count[5] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[5] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[5] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[5] .sum_lutc_input = "cin";
defparam \MeasureU0|SystemClockDivider|Count[5] .synch_mode = "on";
// synopsys translate_on
// atom is at LC_X9_Y4_N7
cyclone_lcell \MeasureU0|SystemClockDivider|Count[6] (
// Equation(s):
// \MeasureU0|SystemClockDivider|Count [6] = DFFEAS(\MeasureU0|SystemClockDivider|Count [6] $ (!(!\MeasureU0|SystemClockDivider|Count[3]~326 & \MeasureU0|SystemClockDivider|Count[5]~328 ) # (\MeasureU0|SystemClockDivider|Count[3]~326 &
// \MeasureU0|SystemClockDivider|Count[5]~328COUT1 )), GLOBAL(\SysClock~combout ), VCC, , , , , \MeasureU0|SystemClockDivider|LessThan0~453_combout , )
// \MeasureU0|SystemClockDivider|Count[6]~329 = CARRY(\MeasureU0|SystemClockDivider|Count [6] & (!\MeasureU0|SystemClockDivider|Count[5]~328 ))
// \MeasureU0|SystemClockDivider|Count[6]~329COUT1 = CARRY(\MeasureU0|SystemClockDivider|Count [6] & (!\MeasureU0|SystemClockDivider|Count[5]~328COUT1 ))
.clk(\SysClock~combout ),
.dataa(\MeasureU0|SystemClockDivider|Count [6]),
.datab(vcc),
.datac(vcc),
.datad(vcc),
.aclr(gnd),
.aload(gnd),
.sclr(\MeasureU0|SystemClockDivider|LessThan0~453_combout ),
.sload(gnd),
.ena(vcc),
.cin(\MeasureU0|SystemClockDivider|Count[3]~326 ),
.cin0(\MeasureU0|SystemClockDivider|Count[5]~328 ),
.cin1(\MeasureU0|SystemClockDivider|Count[5]~328COUT1 ),
.inverta(gnd),
.regcascin(gnd),
.devclrn(devclrn),
.devpor(devpor),
.combout(),
.regout(\MeasureU0|SystemClockDivider|Count [6]),
.cout(),
.cout0(\MeasureU0|SystemClockDivider|Count[6]~329 ),
.cout1(\MeasureU0|SystemClockDivider|Count[6]~329COUT1 ));
// synopsys translate_off
defparam \MeasureU0|SystemClockDivider|Count[6] .cin0_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[6] .cin1_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[6] .cin_used = "true";
defparam \MeasureU0|SystemClockDivider|Count[6] .lut_mask = "a50a";
defparam \MeasureU0|SystemClockDivider|Count[6] .operation_mode = "arithmetic";
defparam \MeasureU0|SystemClockDivider|Count[6] .output_mode = "reg_only";
defparam \MeasureU0|SystemClockDivider|Count[6] .register_cascade_mode = "off";
defparam \MeasureU0|SystemClockDivider|Count[6] .sum_lutc_input = "cin";
defparam \MeasureU0|SystemClockDivider|Count[6] .synch_mode = "on";
// synopsys translate_on
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