?? pll_ram.fit.qmsg
字號:
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "0 " "Info: Fitter placement preparation operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" { } { } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.284 ns memory memory " "Info: Estimated most critical path is memory to memory delay of 3.284 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns dpram8x32:dpram8x32_u1\|altsyncram:altsyncram_component\|altsyncram_7bc1:auto_generated\|ram_block1a0~porta_datain_reg0 1 MEM M4K_X37_Y29 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X37_Y29; Fanout = 1; MEM Node = 'dpram8x32:dpram8x32_u1\|altsyncram:altsyncram_component\|altsyncram_7bc1:auto_generated\|ram_block1a0~porta_datain_reg0'" { } { { "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram_cmp.qrpt" "" "" { Report "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram_cmp.qrpt" Compiler "pll_ram" "UNKNOWN" "V1" "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram.quartus_db" { Floorplan "" "" "" { dpram8x32:dpram8x32_u1|altsyncram:altsyncram_component|altsyncram_7bc1:auto_generated|ram_block1a0~porta_datain_reg0 } "NODE_NAME" } } } { "d:/prj_d/modelsim_demo/pll_ram/db/altsyncram_7bc1.tdf" "" "" { Text "d:/prj_d/modelsim_demo/pll_ram/db/altsyncram_7bc1.tdf" 43 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.284 ns) 3.284 ns dpram8x32:dpram8x32_u1\|altsyncram:altsyncram_component\|altsyncram_7bc1:auto_generated\|ram_block1a0~porta_memory_reg0 2 MEM M4K_X37_Y29 0 " "Info: 2: + IC(0.000 ns) + CELL(3.284 ns) = 3.284 ns; Loc. = M4K_X37_Y29; Fanout = 0; MEM Node = 'dpram8x32:dpram8x32_u1\|altsyncram:altsyncram_component\|altsyncram_7bc1:auto_generated\|ram_block1a0~porta_memory_reg0'" { } { { "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram_cmp.qrpt" "" "" { Report "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram_cmp.qrpt" Compiler "pll_ram" "UNKNOWN" "V1" "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram.quartus_db" { Floorplan "" "" "3.284 ns" { dpram8x32:dpram8x32_u1|altsyncram:altsyncram_component|altsyncram_7bc1:auto_generated|ram_block1a0~porta_datain_reg0 dpram8x32:dpram8x32_u1|altsyncram:altsyncram_component|altsyncram_7bc1:auto_generated|ram_block1a0~porta_memory_reg0 } "NODE_NAME" } } } { "d:/prj_d/modelsim_demo/pll_ram/db/altsyncram_7bc1.tdf" "" "" { Text "d:/prj_d/modelsim_demo/pll_ram/db/altsyncram_7bc1.tdf" 43 2 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.284 ns 100.00 % " "Info: Total cell delay = 3.284 ns ( 100.00 % )" { } { } 0} } { { "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram_cmp.qrpt" "" "" { Report "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram_cmp.qrpt" Compiler "pll_ram" "UNKNOWN" "V1" "d:/prj_d/modelsim_demo/pll_ram/db/pll_ram.quartus_db" { Floorplan "" "" "3.284 ns" { dpram8x32:dpram8x32_u1|altsyncram:altsyncram_component|altsyncram_7bc1:auto_generated|ram_block1a0~porta_datain_reg0 dpram8x32:dpram8x32_u1|altsyncram:altsyncram_component|altsyncram_7bc1:auto_generated|ram_block1a0~porta_memory_reg0 } "NODE_NAME" } } } } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PLACER_ESTIMATED_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Info: Estimated interconnect usage is 1% of the available device resources" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "1 " "Info: Fitter placement operations ending: elapsed time = 1 seconds" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "0 " "Info: Fitter routing operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" { } { } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" { } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1 " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Dec 05 05:42:57 2004 " "Info: Processing ended: Sun Dec 05 05:42:57 2004" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:30 " "Info: Elapsed time: 00:00:30" { } { } 0} } { } 0}
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