AREA Block, CODE, READONLY      ; name this block of code
    ENTRY
    
	IMPORT romCInitRtn
	EXPORT _romInit



_romInit
cold
	MOV	r0, #2	
warm
	B	start


	nop
start

	TEQS	r0, #2
	MOVEQ	r1, #0x1000
	MOVNE	r1, #1

delay_loop 
	SUBS	r1, r1, #1
	BNE	delay_loop




	MOV	r1, #0x278		; Defined in mmuArmLib.h 


	MCR	p15, 0, r1, c1, c0, 0	; Write to MMU CR



	MOV	r1, #0				; data SBZ 
	MCR	p15, 0, r1, c7, c10, 4	; drain write-buffer 


	MCR	p15, 0, r1, c7, c7, 0	; R1 = 0 from above, data SBZ



	MOV	r1, #0
	MCR	p15, 0, r1, c13, c0, 0

	; disable interrupts in CPU and switch to SVC32 mode 

	MRS	r1, cpsr
	BIC	r1, r1, #0x3f
	ORR	r1, r1, #0xD3
	MSR	cpsr_cxsf, r1

	 ; disable individual interrupts in the interrupt controller

	LDR	r2, =0xFFFFF000			; R2->interrupt controller
	MVN	r1, #0				; &FFFFFFFF
	STR	r1, [r2, #0x124]	; disable all IRQ sources 
	

	LDR	r1, =0x55555555
	MOV	r2, #0
	STR	r1, [r2]
	
	LDR r3, [r2]
	cmp r1, r3
	bne  mem_need_remap 
	
	LDR	r1, =0xAAAAAAAA
	STR	r1, [r2]
	LDR r3, [r2]
	cmp r1, r3
	beq skip_mem_remap
	
	
mem_need_remap	
	MOV	r1, #1
	LDR	r2, =0xFFFFFF00
	STR	r1, [r2, #0]

skip_mem_remap


	LDR sp, =0x203000
	
	bl romCInitRtn


deadloop1 
	 nop
	 nop	 
	 b deadloop1

	END