/* ixp425IntrCtl.h - interrupt controller driver Ixp425 *//* Copyright 2002 Wind River Systems, Inc. *//*modification history--------------------01a,05jun02,jb  initial version...*/#ifndef __INCixp425IntrCtlh#define __INCixp425IntrCtlh#include "ixp425.h"#ifdef __cplusplusextern "C" {#endif/* typedefs */#ifndef _ASMLANGUAGE#endif	/* _ASMLANGUAGE *//* * Define Ixp425 Interrupt registers *//******************************************************************  Interrupt Controller Register Definitions.******************************************************************/#define IXP425_ICPR	( IXP425_INTC_BASE + 0x0 )  /* Interrupt Status Reg. */#define IXP425_ICMR	( IXP425_INTC_BASE + 0x4 )  /* Interrupt Enable Reg. */#define IXP425_ICLR	( IXP425_INTC_BASE + 0x8 )  /* Interrupt Select Reg IRQ/FIQ */#define IXP425_ICIP	( IXP425_INTC_BASE + 0xC )  /* IRQ Status Reg. */#define IXP425_ICFP	( IXP425_INTC_BASE + 0x10 ) /* FIQ Status Reg. */#define IXP425_ICHR	( IXP425_INTC_BASE + 0x14 ) /* Interrupt Priority Reg. */#define IXP425_ICIH	( IXP425_INTC_BASE + 0x18 ) /* IRQ Highest Pri Int Reg. */#define IXP425_ICFH	( IXP425_INTC_BASE + 0x1C ) /* FIQ Highest Pri Int Reg. */#define IXP425_INT_LVL_PSMA		(0)#define IXP425_INT_LVL_PSMB		(1)#define IXP425_INT_LVL_PSMC		(2)#define IXP425_INT_LVL_QM1		(3)#define IXP425_INT_LVL_QM2		(4)#define IXP425_INT_LVL_TIMER1		(5)#define IXP425_INT_LVL_GPIO0		(6)#define IXP425_INT_LVL_GPIO1		(7)#define IXP425_INT_LVL_PCI_INT		(8)#define IXP425_INT_LVL_PCI_DMA1		(9)#define IXP425_INT_LVL_PCI_DMA2		(10)#define IXP425_INT_LVL_TIMER2		(11)#define IXP425_INT_LVL_USB		(12)#define IXP425_INT_LVL_UART2		(13)#define IXP425_INT_LVL_TIMESTAMP	(14)#define IXP425_INT_LVL_UART1		(15)#define IXP425_INT_LVL_WDOG		(16)#define IXP425_INT_LVL_AHB_PMU		(17)#define IXP425_INT_LVL_XSCALE_PMU	(18)#define IXP425_INT_LVL_GPIO2		(19)#define IXP425_INT_LVL_GPIO3		(20)#define IXP425_INT_LVL_GPIO4		(21)#define IXP425_INT_LVL_GPIO5		(22)#define IXP425_INT_LVL_GPIO6		(23)#define IXP425_INT_LVL_GPIO7		(24)#define IXP425_INT_LVL_GPIO8		(25)#define IXP425_INT_LVL_GPIO9		(26)#define IXP425_INT_LVL_GPIO10		(27)#define IXP425_INT_LVL_GPIO11		(28)#define IXP425_INT_LVL_GPIO12		(29)#define IXP425_INT_LVL_INT1		(30)#define IXP425_INT_LVL_INT2		(31)/* Bit definitions for Interrupt Pending/Mask/Status registers */#define IXP425_INTC_PSMA		(1 << IXP425_INT_LVL_PSMA)#define IXP425_INTC_PSMB		(1 << IXP425_INT_LVL_PSMB)#define IXP425_INTC_PSMC		(1 << IXP425_INT_LVL_PSMC)#define IXP425_INTC_QM1			(1 << IXP425_INT_LVL_QM1)#define IXP425_INTC_QM2			(1 << IXP425_INT_LVL_QM2)#define IXP425_INTC_TIMER1		(1 << IXP425_INT_LVL_TIMER1)#define IXP425_INTC_GPIO0		(1 << IXP425_INT_LVL_GPIO0)#define IXP425_INTC_GPIO1		(1 << IXP425_INT_LVL_GPIO1)#define IXP425_INTC_PCI_INT		(1 << IXP425_INT_LVL_PCI_INT)#define IXP425_INTC_PCI_DMA1		(1 << IXP425_INT_LVL_PCI_DMA1)#define IXP425_INTC_PCI_DMA2		(1 << IXP425_INT_LVL_PCI_DMA2)#define IXP425_INTC_TIMER2		(1 << IXP425_INT_LVL_TIMER2)#define IXP425_INTC_USB			(1 << IXP425_INT_LVL_USB)#define IXP425_INTC_UART2		(1 << IXP425_INT_LVL_UART2)#define IXP425_INTC_TIMESTAMP		(1 << IXP425_INT_LVL_TIMESTAMP)#define IXP425_INTC_UART1		(1 << IXP425_INT_LVL_UART1)#define IXP425_INTC_WDOG		(1 << IXP425_INT_LVL_WDOG)#define IXP425_INTC_AHB_PMU		(1 << IXP425_INT_LVL_AHB_PMU)#define IXP425_INTC_XSCALE_PMU		(1 << IXP425_INT_LVL_XSCALE_PMU)#define IXP425_INTC_GPIO2		(1 << IXP425_INT_LVL_GPIO2)#define IXP425_INTC_GPIO3		(1 << IXP425_INT_LVL_GPIO3)#define IXP425_INTC_GPIO4		(1 << IXP425_INT_LVL_GPIO4)#define IXP425_INTC_GPIO5		(1 << IXP425_INT_LVL_GPIO5)#define IXP425_INTC_GPIO6		(1 << IXP425_INT_LVL_GPIO6)#define IXP425_INTC_GPIO7		(1 << IXP425_INT_LVL_GPIO7)#define IXP425_INTC_GPIO8		(1 << IXP425_INT_LVL_GPIO8)#define IXP425_INTC_GPIO9		(1 << IXP425_INT_LVL_GPIO9)#define IXP425_INTC_GPIO10		(1 << IXP425_INT_LVL_GPIO10)#define IXP425_INTC_GPIO11		(1 << IXP425_INT_LVL_GPIO11)#define IXP425_INTC_GPIO12		(1 << IXP425_INT_LVL_GPIO12)#define IXP425_INTC_SW_INT1		(1 << IXP425_INT_LVL_INT1)#define IXP425_INTC_SW_INT2		(1 << IXP425_INT_LVL_INT2)/* Vector definitions */#define IXP425_INT_NUM_LEVELS		(32)#define IXP425_INT_MODE			INT_NON_PREEMPT_MODEL#define INT_VEC_PSMA		IVEC_TO_INUM(IXP425_INT_LVL_PSMA)#define INT_VEC_PSMB		IVEC_TO_INUM(IXP425_INT_LVL_PSMB)#define INT_VEC_PSMC		IVEC_TO_INUM(IXP425_INT_LVL_PSMC)#define INT_VEC_QM1		IVEC_TO_INUM(IXP425_INT_LVL_QM1 )#define INT_VEC_QM2		IVEC_TO_INUM(IXP425_INT_LVL_QM2 )#define INT_VEC_TIMER1		IVEC_TO_INUM(IXP425_INT_LVL_TIMER1)#define INT_VEC_GPIO0		IVEC_TO_INUM(IXP425_INT_LVL_GPIO0)#define INT_VEC_GPIO1		IVEC_TO_INUM(IXP425_INT_LVL_GPIO1)#define INT_VEC_PCI_ERR		IVEC_TO_INUM(IXP425_INT_LVL_PCI_ERR)#define INT_VEC_PCI_DMA1	IVEC_TO_INUM(IXP425_INT_LVL_PCI_DMA1)#define INT_VEC_PDI_DMA2	IVEC_TO_INUM(IXP425_INT_LVL_PCI_DMA2)#define INT_VEC_TIMER2		IVEC_TO_INUM(IXP425_INT_LVL_TIMER2)#define INT_VEC_APB_DMA		IVEC_TO_INUM(IXP425_INT_LVL_APB_DMA)#define INT_VEC_USB		IVEC_TO_INUM(IXP425_INT_LVL_USB)#define INT_VEC_UART1		IVEC_TO_INUM(IXP425_INT_LVL_UART1)#define INT_VEC_TIMESTAMP	IVEC_TO_INUM(IXP425_INT_LVL_TIMESTAMP)#define INT_VEC_UART2		IVEC_TO_INUM(IXP425_INT_LVL_UART2)#define INT_VEC_WDOG		IVEC_TO_INUM(IXP425_INT_LVL_WDOG)#define INT_VEC_AHB_PMU		IVEC_TO_INUM(IXP425_INT_LVL_AHB_PMU)#define INT_VEC_XSCALE_PMU	IVEC_TO_INUM(IXP425_INT_LVL_XSCALE_PMU)#define INT_VEC_GPIO2		IVEC_TO_INUM(IXP425_INT_LVL_GPIO2)#define INT_VEC_GPIO3		IVEC_TO_INUM(IXP425_INT_LVL_GPIO3)#define INT_VEC_GPIO4		IVEC_TO_INUM(IXP425_INT_LVL_GPIO4)#define INT_VEC_GPIO5		IVEC_TO_INUM(IXP425_INT_LVL_GPIO5)#define INT_VEC_GPIO6		IVEC_TO_INUM(IXP425_INT_LVL_GPIO6)#define INT_VEC_GPIO7		IVEC_TO_INUM(IXP425_INT_LVL_GPIO7)#define INT_VEC_GPIO8		IVEC_TO_INUM(IXP425_INT_LVL_GPIO8)#define INT_VEC_GPIO9		IVEC_TO_INUM(IXP425_INT_LVL_GPIO9)#define INT_VEC_GPIO10		IVEC_TO_INUM(IXP425_INT_LVL_GPIO10)#define INT_VEC_GPIO11		IVEC_TO_INUM(IXP425_INT_LVL_GPIO11)#define INT_VEC_GPIO12		IVEC_TO_INUM(IXP425_INT_LVL_GPIO12)#define INT_VEC_INT1		IVEC_TO_INUM(IXP425_INT_LVL_INT1)#define INT_VEC_INT2            IVEC_TO_INUM(IXP425_INT_LVL_INT2)/* * Set the default value of   ICHP - Interrupt highest priorty encoding register. */#ifndef IXP425_ICHR_INIT_VALUE#define IXP425_ICHR_INIT_VALUE (0x00fac688)#endif#ifdef __cplusplus}#endif#endif	/* __INCIxp425IntrCtrl */