/* config.h - IXP425 Eval board configuration header */

/* Copyright 2002 Wind River Systems, Inc. */

/*
modification history
--------------------
01m,07apr03,m_h  Enable INCLUDE_IXETHACCEND by default
01l,04apr03,m_h  misc changes for rev 3
01k,27feb03,jb3  add C++ protection
01j,14nov02,jb3  bump decimalrev
01i,17oct02,jb  Bump rev
01h,07oct02,jb  Remove IP address size change
01g,18sep02,jb  Increasing ixEth block counts
01f,18sep02,jb  Enable ixEthAccEnd
01e,14aug02,jb  Continuing End support and changing sdram from 128MB to 256MB
01d,26jun02,jb  Adding ixp425 End support
01c,18jun02,jb  Changing BOARD_DESC
01b,12jun02,jb  Continuing restructure
01a,05jun02,jb  initial version...
*/

/*
This module contains the configuration parameters for ixp425 IXDP425 platform.
*/


#ifndef INCconfigh
 #define INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

#define SDRAM_SIZE_128M  1  /*must modify the makefile manually*/
/** BSP version/revision identification, before configAll.h **/

 #define BSP_VER_1_2     1	/* 1.2 is backward compatible with 1.1 */
 #define BSP_VER_1_1	 1	
 #define BSP_VERSION	 "1.3"	/* Version string */
 #define BSP_REV	 "/3"	/* 0 for first revision */

 #define BOARD_DESC	"Intel IXP425 - IXDP425 BE"

 #include "configAll.h" /* Include the default configurations */

#define INCLUDE_IXETH
#ifdef INCLUDE_IXETH
#ifndef   _ASMLANGUAGE
 /* Detect invalid CSR_BASE early */
 #include "IxTypes.h"
#endif /* _ASMLANGUAGE */
#endif /* INCLUDE_IXETH */

#undef INCLUDE_WINDVIEW
#undef INCLUDE_WINDVIEW_CLASS


/*
 * STANDALONE_NET must be defined for network debug with
 * standalone vxWorks.st
 */
#define STANDALONE_NET

/*
 * make use of data cache for fast DRAM
 */
 #undef INCLUDE_FAST_DRAM
 #ifdef INCLUDE_FAST_DRAM
  #define FD_CACHELINE	  8		 /* 8 UINT32's in a cache line (32-bytes) */
  #define FD_LINESPERSET 28		 /* 28 available cache lines per set */
  #define FD_SETS	 32		 /* 32 sets in data cache */

  #define FD_MAX_LINES (FD_LINESPERSET * FD_SETS)      /* Max number of lines one can allocate (28 x 32) */

/*
 * Location of virtual address just above SDRAM. This must be outside everybody else's
 * address to avoid colision issues.
 */
  #define FD_ORIGIN    0x10000000	 
  #define FD_MAX_SIZE  0x7000		 /* Max size for MMU table description, 28Kbytes */

/* modify based on the number of cache lines you want to use as data ram... */
  #define FD_NUMLINES  FD_MAX_LINES	 /* set for max 28Kbytes */
 #endif /* INCLUDE_FAST_DRAM */

/*
#define INCLUDE_TFFS
*/

/* 
 * Support network devices.
 */
#define  INCLUDE_NETWORK

/* 
 * First line below indicates host (xx.xx.xx.xx) and path of image
 *  (c:\vxWorks). The parameters that follow are:
 *  h  = Internet address of host (xx.xx.xx.xx)
 *  e  = Internet address of target (xx.xx.xx.xx)
 *  tn = Name of target machine
 *  u  = user name used to access host
 *  pw = password for user
 *  o  = other
 */

#define DEFAULT_BOOT_LINE \
	   "fei(0,0)host:VxWorks " \
	  "h=192.168.0.122 e=192.168.0.155 u=target pw=target tn=Fids425"

/** Selection Macros, which might have affect later **/

 #define INCLUDE_SYS_HW_INIT_0
 #ifdef INCLUDE_SYS_HW_INIT_0
  #ifndef _ASMLANGUAGE
   IMPORT void sysHwInit0 (void);
  #endif /* _ASMLANGUAGE */
  #define SYS_HW_INIT_0() sysHwInit0 ()
 #endif /* INCLUDE_SYS_HW_INIT_0 */

 #define INCLUDE_TIMESTAMP
 #define INCLUDE_USER_TIMESTAMP

 #ifdef INCLUDE_USER_TIMESTAMP
  #define USER_TIMESTAMP      sysTimestamp
  #define USER_TIMESTAMPLOCK  sysTimestampLock
  #define USER_TIMEENABLE     sysTimestampEnable
  #define USER_TIMEDISABLE    sysTimestampDisable
  #define USER_TIMECONNECT    sysTimestampConnect
  #define USER_TIMEPERIOD     sysTimestampPeriod
  #define USER_TIMEFREQ	      sysTimestampFreq
 #endif	 /* INCLUDE_USER_TIMESTAMP */

 #define INCLUDE_EXC_HANDLING
 #define INCLUDE_EXC_TASK

 #define INCLUDE_RAM_PAGE_TABLE

 #define INCLUDE_UART1_SUPPORT   /* Include Uart 1 console support  */
 #define INCLUDE_UART2_SUPPORT   /* Include Uart 2 console support  */


#define INCLUDE_WDB

/*** UART ***/
/*
 * Since there are two UARTs. The default UART defs like NUM_TTY, CONSOLE_TTY
 * and CONSOLE_BAUD_RATE in configAll.h should work fine. If you change any
 * defaults, it might affect the WDB defs also, so cross check with WDB defs.
 *
*/
 #define N_UARTS	   2	    /* Enable both uarts */
 #undef	 NUM_TTY
 #define NUM_TTY	   N_UARTS
 #define DEFAULT_BAUD	   115200
 #define UART_DEFAULT_BAUD 115200

 #undef	 CONSOLE_TTY
 #define CONSOLE_TTY	   1

 #undef	 CONSOLE_BAUD_RATE
 #define CONSOLE_BAUD_RATE DEFAULT_BAUD

/*
 * Define SERIAL_DEBUG to enable Windriver debugging
 * via the serial ports.
 */
 #undef SERIAL_DEBUG

#ifdef INCLUDE_WDB
 #ifdef SERIAL_DEBUG
  #define WDB_NO_BAUD_AUTO_CONFIG

  #undef WDB_COMM_TYPE
  #undef WDB_TTY_BAUD
  #undef WDB_TTY_CHANNEL
  #undef WDB_TTY_DEV_NAME

  #define WDB_COMM_TYPE		  WDB_COMM_SERIAL /* WDB in Serial mode */
  #define WDB_TTY_BAUD		  9600	  /* Baud rate for WDB Connection */
  #define WDB_TTY_CHANNEL	  1		  /* COM PORT #2 */
  #define WDB_TTY_DEV_NAME	  "/tyCo/1"	  /* default TYCODRV_5_2 device name */
 #else /* SERIAL_DEBUG */
  /* Network WDB engine. */
 #endif /* SERIAL_DEBUG */
#endif /* INCLUDE_WDB */

/*** MMU ***/
 #define INCLUDE_MMU_BASIC

 #ifdef INCLUDE_MMU_FULL  /* Full MMU Configuration */
  #undef INCLUDE_MMU_BASIC
 #endif /* INCLUDE_MMU_FULL */

 #ifdef INCLUDE_MMU_BASIC /* Basic MMU Configuration */
  #undef INCLUDE_MMU_FULL
 #endif /* INCLUDE_MMU_BASIC */

 #if defined(INCLUDE_MMU_FULL) || defined(INCLUDE_MMU_BASIC)
  #define INCLUDE_MMU_VIRTUAL_MEM_EQUAL_PHY_MEM  /* Provide BSP mmuPhysToVirt,mmuVirtToPhys linear 1:1 mapping */
 #endif /* INCLUDE_MMU_FULL || INCLUDE_MMU_BASIC */

/***************************** 
 * Cache  support 
 ******************************/
 #define INCLUDE_CACHE_SUPPORT

/* StrongARM I-cache mode is a bit of an inappropriate concept, but use this */
 #undef	 USER_I_CACHE_MODE
 #define USER_I_CACHE_MODE	 CACHE_WRITETHROUGH

/* StrongARM has to be this, as it does not support writethrough */
 #undef	 USER_D_CACHE_MODE
 #define USER_D_CACHE_MODE	 CACHE_COPYBACK

/* If ROM code enables MMU then define ROM_ENABLES_MMU */
#undef ROM_ENABLES_MMU

#ifdef ROM_ENABLES_MMU

/*
 * if you def/undef the SECOND_LEVEL_PAGE_TABLE, you need to change the
 * ROM_TEXT_ADRS in the Makefile. see #define ROM_TEXT_ADRS
 */
 #undef SECOND_LEVEL_PAGE_TABLE	 /* selected the two level table */

 /* Location of the translation table base, it needs to be 16k aligned */
 #define MMU_TRANSLATION_BASE 0x00004000

 #if defined(SECOND_LEVEL_PAGE_TABLE)
  #define MMU_TABLE_SIZE     0x4800
 #else
  #define MMU_TABLE_SIZE     0x4000
 #endif /* SECOND_LEVEL_PAGE_TABLE */
#else

 /* MMU not enabled */
 #define MMU_TRANSLATION_BASE 0x1000
 #define MMU_TABLE_SIZE     0x0000

#endif /* ROM_ENABLES_MMU */

 #if defined(INCLUDE_MMU_BASIC) || defined(INCLUDE_MMU_FULL)
  #define INCLUDE_MMU
 #endif /* NCLUDE_MMU_BASIC || INCLUDE_MMU_FULL */

 #undef VM_PAGE_SIZE
 #define VM_PAGE_SIZE		4096

/* Memory configuration */
#undef LOCAL_MEM_AUTOSIZE		    		/* NO run-time memory sizing */
#define LOCAL_MEM_LOCAL_ADRS	0x00000000  		/* The start of on board memory area */ 
/*#define LOCAL_MEM_SIZE		(256 * 0x00100000)  xfsun delete	*//* 256Meg - amout of memory for VxWorks  - all */ 
#if SDRAM_SIZE_128M
#define LOCAL_MEM_SIZE		(128 * 0x00100000) 	/* 256Meg - amout of memory for VxWorks  - all */ 
#else
#define LOCAL_MEM_SIZE		(256 * 0x00100000) 	/* 256Meg - amout of memory for VxWorks  - all */ 
#endif
/* #define USER_RESERVED_MEM	(4 *  0x00100000)  xfsun delete*/   	/* 4Meg for now */
#define USER_RESERVED_MEM	( 4 * 0x00100000)   	/* 4Meg for now */


/*** RAM Information ***/
/* Link Address: To where the bootrom image will be decompressed  into reserved memory at top of memory*/
/* #define RAM_HIGH_ADRS           0x08000000	xfsun delete */	/* 128MB - This must be the same as in Makefile */
#if SDRAM_SIZE_128M
#define RAM_HIGH_ADRS           0x06c00000	/* 16 MB - This must be the same as in Makefile */
#else
#define RAM_HIGH_ADRS           0x0ec00000	/* alex must larger than 16 MB - This must be the same as in Makefile */
#endif
/* RAM starting address, RAM Size */
#define RAM_LOW_ADRS            0x00010000  /* VxWorks image entry point */ 


/*
 * Boot ROM is an image written into Flash ROM and started
 * at address 0. Due to the remapping of memory by the internal BUS
 * controller , the Flash memory appears at an address of 0x50000000.
 *
 * The following parameters are defined here and in the Makefile.