** sys557IntAck - acknowledge an 82557 interrupt** This routine performs any 82557 interrupt acknowledge that may be* required.  This typically involves an operation to some interrupt* control hardware.** This routine gets called from the 82557 driver's interrupt handler.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if the interrupt could not be acknowledged.*/LOCAL STATUS sys557IntAck    (    int	unit		/* unit number */    ){    FEI_RESOURCE * pReso = &feiResources [unit];    switch (pReso->boardType)	{	case PRO100B:		/* handle PRO100B LAN Adapter */        case INBUSINESS:        case XX82559ER:	    /* no addition work necessary for the PRO100B */	    break;	default:	    return (ERROR);	}    return (OK);    }/********************************************************************************* sys557IntEnable - enable 82557 interrupts** This routine enables 82557 interrupts.  This may involve operations on* interrupt control hardware.** The 82557 driver calls this routine throughout normal operation to terminate* critical sections of code.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if interrupts could not be enabled.*/LOCAL STATUS sys557IntEnable    (    int	unit		/* unit number */    ){    FEI_RESOURCE * pReso = &feiResources [unit];    switch (pReso->boardType)	{	case PRO100B:		/* handle PRO100B LAN Adapter */        case INBUSINESS:        case XX82559ER:            intEnable (pReso->irq);	    break;	default:	    return (ERROR);	}    return (OK);    }/********************************************************************************* sys557IntDisable - disable 82557 interrupts** This routine disables 82557 interrupts.  This may involve operations on* interrupt control hardware.** The 82557 driver calls this routine throughout normal operation to enter* critical sections of code.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if interrupts could not be disabled.*/LOCAL STATUS sys557IntDisable    (    int	unit		/* unit number */    ){    FEI_RESOURCE * pReso = &feiResources [unit];    switch (pReso->boardType)	{	case PRO100B:		/* handle PRO100B LAN Adapter */        case INBUSINESS:        case XX82559ER:            intDisable (pReso->irq); 	    break;	default:	    return (ERROR);	}    return (OK);    }/********************************************************************************* sys557eepromRead - read a word from the 82557 EEPROM** RETURNS: the EEPROM data word read in.*/LOCAL UINT16 sys557eepromRead    (    int	unit,		/* unit number */    int	location	/* address of word to be read */    ){    UINT32 iobase = feiResources[unit].iobaseCsr;    UINT16 retval = 0;    UINT16 dataval;    UINT32 eeaddr = iobase + SCB_EEPROM;    int cmdlen = 27;    int readcmd = EE_CMD_READ << 22;    readcmd = readcmd | (location << 16);    /*Enable EEPROM*/    sysPciOutWord(eeaddr, EE_ENB | EE_SK);        do    {	dataval = (readcmd & (1 << cmdlen)) ?  EE_WRITE_1 : EE_WRITE_0;	sysPciOutWord(eeaddr, dataval);		sysDelay();	sysPciOutWord(eeaddr, dataval | EE_SK);	sysDelay();	dataval=sysInWord(eeaddr);	retval = (retval << 1) | ((dataval & EE_DO) ? 1 : 0);     } while(cmdlen-- > 0);    sysPciOutWord(eeaddr, EE_ENB);    sysPciOutWord(eeaddr, EE_ENB & ~EE_CS);    return retval;    #if 0    sysPciOutWord (iobase + SCB_EEPROM, EE_CS);	/* enable EEPROM */    /* write the READ opcode */    for (ix = EE_CMD_BITS - 1; ix >= 0; ix--)	{        dataval = (EE_CMD_READ & (1 << ix)) ? EE_DI : 0;        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | dataval);        sysDelay ();	/* delay for one I/O READ cycle */        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | dataval | EE_SK);        sysDelay ();	/* delay for one I/O READ cycle */        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | dataval);        sysDelay ();	/* delay for one I/O READ cycle */        }    /* write the location */    for (ix = EE_ADDR_BITS - 1; ix >= 0; ix--)	{        dataval = (location & (1 << ix)) ? EE_DI : 0;        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | dataval);        sysDelay ();	/* delay for one I/O READ cycle */        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | dataval | EE_SK);        sysDelay ();	/* delay for one I/O READ cycle */        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | dataval);        sysDelay ();	/* delay for one I/O READ cycle */	dummy = sysInWord (iobase + SCB_EEPROM);        }    if ((dummy & EE_DO) == 0)		/* dummy read */	;    /* read the data */    for (ix = EE_DATA_BITS - 1; ix >= 0; ix--)	{        sysPciOutWord (iobase + SCB_EEPROM, EE_CS | EE_SK);        sysDelay ();	/* delay for one I/O READ cycle */        retval = (retval << 1) |	         ((sysInWord (iobase + SCB_EEPROM) & EE_DO) ? 1 : 0);        sysPciOutWord (iobase + SCB_EEPROM, EE_CS);        sysDelay ();	/* delay for one I/O READ cycle */        }    sysPciOutWord (iobase + SCB_EEPROM, 0x00);	/* disable EEPROM */    return (retval);#endif    }/********************************************************************************* sys557mdioRead - read MDIO** RETURNS: read value*/LOCAL UINT32 sys557mdioRead    (    int	unit,		/* unit number */    int phyId,		/* PHY ID */    int location	/* location to read */    ){    UINT32 iobase = feiResources[unit].iobaseCsr;    int timeout   = 64*4;	/* <64 usec. to complete, typ 27 ticks */    int val;    sysPciOutLong (iobase + SCB_MDI, 0x08000000 | (location<<16) | (phyId<<21));    do  {        sysDelay ();	/* delay for one I/O READ cycle */        val = sysInLong (iobase + SCB_MDI);        if (--timeout < 0)            printf ("sys557mdioRead() timed out with val = %8.8x.\n", val);        } while (! (val & 0x10000000));    return (val & 0xffff);    }/********************************************************************************* sys557mdioWrite - write MDIO** RETURNS: write value*/LOCAL UINT32 sys557mdioWrite    (    int unit,		/* unit number */    int phyId,		/* PHY ID */    int location,	/* location to write */    int value		/* value to write */    ){    UINT32 iobase = feiResources[unit].iobaseCsr;    int timeout   = 64*4;	/* <64 usec. to complete, typ 27 ticks */    int val;    sysPciOutLong (iobase + SCB_MDI,		0x04000000 | (location<<16) | (phyId<<21) | value);    do  {        sysDelay ();	/* delay for one I/O READ cycle */        val = sysInLong (iobase + SCB_MDI);        if (--timeout < 0)            printf ("sys557mdioWrite() timed out with val = %8.8x.\n", val);        } while (! (val & 0x10000000));    return (val & 0xffff);    }/********************************************************************************* sys557Show - shows 82557 configuration** This routine shows the (Intel Pro Express 100) configuration** RETURNS: N/A*/void sys557Show    (    int	unit		/* unit number */    ){    FEI_RESOURCE * pReso = &feiResources [unit];    UINT32 iobase       = pReso->iobaseCsr;    UCHAR etheraddr[6];    int ix;    int iy;    if (unit > IXP425_PCI_MAX_DEV)	{	printf ("Illegal unit number %d\n", unit);	return;	}    if (pReso->boardType == UNKNOWN)	{	printf ("Unit %d not an FEI device\n", unit);	return;	}    for (ix = 0, iy = 0; ix < 3; ix++)	{        etheraddr[iy++] = pReso->eeprom[ix];        etheraddr[iy++] = pReso->eeprom[ix] >> 8;        }    printf ("fei%d: Intel EtherExpress Pro 10/100 at %#8x ", unit, iobase);    for (ix = 0; ix < 5; ix++)    	printf ("%2.2X:", etheraddr[ix]);    printf ("%2.2X\n", etheraddr[ix]);    printf ("CSR mem base address = %x, Flash mem base address = %x\n",	    pReso->membaseCsr, pReso->membaseFlash);    if (pReso->eeprom[3] & 0x03)        printf ("Receiver lock-up bug exists -- enabling work-around.\n");    printf ("Board assembly %4.4x%2.2x-%3.3d, Physical connectors present:",	pReso->eeprom[8], pReso->eeprom[9]>>8, pReso->eeprom[9] & 0xff);    for (ix = 0; ix < 4; ix++)	if (pReso->eeprom[5] & (1 << ix))	    printf ("%s", connectors [ix]);    printf ("\nPrimary interface chip %s PHY #%d.\n",	phys[(pReso->eeprom[6]>>8)&15], pReso->eeprom[6] & 0x1f);    if (pReso->eeprom[7] & 0x0700)	printf ("Secondary interface chip %s.\n",		phys[(pReso->eeprom[7]>>8)&7]);#if	FALSE  /* we don't show PHY specific info at this time */    /* ToDo: Read and set PHY registers through MDIO port. */    for (ix = 0; ix < 2; ix++)	printf ("MDIO register %d is %4.4x.\n",		ix, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, ix));    for (ix = 5; ix < 7; ix++)	printf ("MDIO register %d is %4.4x.\n",		ix, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, ix));    printf ("MDIO register %d is %4.4x.\n",	    25, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 25));#endif	/* FALSE */    if (pReso->timeout < 0)        {		/* Test optimized out. */	printf ("Self test failed, status %8.8x:\n"	        " Failure to initialize the 82557.\n"	        " Verify that the card is a bus-master capable slot.\n",	        pReso->pResults[1]);	}    else        {	printf ("General self-test: %s.\n"	        " Serial sub-system self-test: %s.\n"	        " Internal registers self-test: %s.\n"	        " ROM checksum self-test: %s (%#8.8x).\n",	        pReso->pResults[1] & 0x1000 ? "failed" : "passed",	        pReso->pResults[1] & 0x0020 ? "failed" : "passed",	        pReso->pResults[1] & 0x0008 ? "failed" : "passed",	        pReso->pResults[1] & 0x0004 ? "failed" : "passed",	        pReso->pResults[0]);        }    }#endif /* INCLUDE_FEI82557END *//********************************************************************************* sysDelay - a small delay**/void sysDelay (void)    {    sysMicroDelay(PCI_CONFIG_DELAY);     return;    }/******************************************************************************** sys557EndPciToPhys - translate a Pci address to a physical address** This function converts a Pci address to a physical address. This only works* for PCI Memory space.** RETURNS: the physical adddress*/UINT32 sys557EndPciToPhys    (    int		unit,    UINT32      PciAddr /* PCI address */    )    {    return((UINT32)sysPciToPhys((void *)PciAddr));    }/******************************************************************************** sys557EndPhysToPci - translate a physical address to a Pci address** This function converts a physical address to a Pci address. This only works* for PCI Memory space.** RETURNS: the Pci adddress*/UINT32 sys557EndPhysToPci    (    int		unit,    UINT32      PhysAddr        /* Physical address */    )    {    return ((UINT32)sysPhysToPci((void *)PhysAddr));    }#endif /* INCLUDE_END */