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<?xml version="1.0"?>
<!DOCTYPE armperip SYSTEM "armperip.dtd">
<!-- Copyright (c) ARM Limited 2000-2002. All Rights Reserved. -->

<!-- Definitions of ARM standard processors -->

<!--
The following references were used in the construction of this document:
[1] ARM Integrator/CM7TDMI User Guide, ARM DUI 0126A, ARM Ltd., 1999
[2] Integrator CM9x6ES Datasheet, CONGO-0021-CUST-DSHT-B02, ARM Ltd., 1999
[3] Integrator CM10200 Datasheet, CONGO-0022-CUST-DSHT-B, ARM Ltd., 2000
[4] ARM Integrator/AP User Guide, ARM DUI 0098A, ARM Ltd., 1999
[5] ARM Architecture Reference Manual, ARM DDI 0100E, ARM Ltd, 1996-2000
[6] ARM1020T (Rev 0) Technical Reference Manual, ARM DDI 0135A, ARM Ltd., 2001
[7] ARM1020E Technical Reference Manual, ARM DDI 0177A, ARM Ltd., 2001
[8] ARM922T (Rev 0) Technical Reference Manual, ARM DDI 0184B, ARM Ltd., 2001
[9] ARM1026EJ-S Engineering Specification, AS007-PRDC-000826 6, 21st May 2002
-->

<armperip>

<cvs_info>
  <author>$Author: mwilliam $</author>
  <revision>$Revision: 1.74.2.7.2.1.2.5 $</revision>
  <date>$Date: 2004/09/02 15:36:35 $</date>
</cvs_info>

<displaytype>
  <name>unsigned_left_32</name>
  <requires></requires>
  <definition>
TYPEDEF unsigned_left_32(NAME="32 bit counter", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:0](NAME="Counter", TYPE=NUMERIC(WIDTH=32, DEFAULT="UDEC", PRINTF="%u"))
}
  </definition>
</displaytype>

<displaytype>
  <name>ChipID7</name>
  <requires></requires>
  <definition>
TYPEDEF tImplementor7 ENUM(WIDTH=8, DEFAULT="Unknown")
{
  "ARM"   = 0x41,
  "DEC"   = 0x44,
  "TI"    = 0x54,
  "Intel" = 0x69
}

TYPEDEF tArchitecture7 ENUM(WIDTH=1)
{
  "3" = 0x0,
  "4T" = 0x1
}

TYPEDEF ChipID7(NAME="ID Register (ARM7 Family)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:24] (NAME="Implementor", TYPE=tImplementor7, ACCESS="R"),
  SEPARATOR(TEXTNAME=" "),
  FIELD[15:4] (NAME="Part", TYPE=NUMERIC(WIDTH=12, DEFAULT="HEX"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" rev"),
  FIELD[3:0] (NAME="Revision", TYPE=NUMERIC(WIDTH=4, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" variant"),
  FIELD[22:16] (NAME="Architecture version", TYPE=NUMERIC(WIDTH=7, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" arch "),
  FIELD[23] (NAME="Architecuture", TYPE=tArchitecture7, ACCESS="R")
}
  </definition>
</displaytype>

<displaytype>
  <name>ChipID</name>
  <requires></requires>
  <definition>
TYPEDEF tImplementor ENUM(WIDTH=8, DEFAULT="Unknown")
{
  "ARM"   = 0x41,
  "DEC"   = 0x44,
  "TI"    = 0x54,
  "Intel" = 0x69
}

TYPEDEF tArchitecture ENUM(WIDTH=4, DEFAULT="Unknown")
{
  "4" = 0x1,
  "4T" = 0x2,
  "5" = 0x3,
  "5T" = 0x4,
  "5TE" = 0x5,
  "5TEJ" = 0x6
}

TYPEDEF ChipID(NAME="ID Register", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:24] (NAME="Implementor", TYPE=tImplementor, ACCESS="R"),
  SEPARATOR(TEXTNAME=" "),
  FIELD[15:12] (NAME="Part1", TYPE=NUMERIC(WIDTH=4, DEFAULT="UDEC"), ACCESS="R"),
  FIELD[11:4] (NAME="Part2", TYPE=NUMERIC(WIDTH=8, DEFAULT="HEX"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" rev"),
  FIELD[3:0] (NAME="Revision", TYPE=NUMERIC(WIDTH=4, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" variant"),
  FIELD[23:20] (NAME="Variant", TYPE=NUMERIC(WIDTH=4, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" arch "),
  FIELD[19:16] (NAME="Architecture", TYPE=tArchitecture, ACCESS="R")
}
  </definition>
</displaytype>

<displaytype>
  <name>ChipID_Intel</name>
  <requires></requires>
  <definition>
TYPEDEF tImplementor ENUM(WIDTH=8, DEFAULT="Unknown")
{
  "ARM"   = 0x41,
  "DEC"   = 0x44,
  "TI"    = 0x54,
  "Intel" = 0x69
}

TYPEDEF tArchitecture ENUM(WIDTH=4, DEFAULT="Unknown")
{
  "4" = 0x1,
  "4T" = 0x2,
  "5" = 0x3,
  "5T" = 0x4,
  "5TE" = 0x5,
  "5TEJ" = 0x6
}

TYPEDEF tIntelGeneration ENUM(WIDTH=3, DEFAULT="Unknown")
{
  "XScale" = 0x1
}

TYPEDEF tIntelProduct ENUM(WIDTH=6, DEFAULT="Unknown")
{
  "80200" = 0x0,
  "80321 (400MHz)" = 0x02,
  "80321 (600MHz)" = 0x03,
  "PXA250" = 0x10,
  "PXA210" = 0x12
}

TYPEDEF ChipID_Intel(NAME="ID Register (XScale Family)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:24] (NAME="Implementor", TYPE=tImplementor, ACCESS="R"),
  SEPARATOR(TEXTNAME=" "),
  FIELD[15:13] (NAME="Generation", TYPE=tIntelGeneration, ACCESS="R"),
  SEPARATOR(TEXTNAME=" rev "),
  FIELD[12:10] (NAME="Core Revision", TYPE=NUMERIC(WIDTH=3, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" "),
  FIELD[9:4] (NAME="Product", TYPE=tIntelProduct, ACCESS="R"),
  SEPARATOR(TEXTNAME=" rev "),
  FIELD[3:0] (NAME="Product Revision", TYPE=NUMERIC(WIDTH=4, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" variant "),
  FIELD[23:20] (NAME="Variant", TYPE=NUMERIC(WIDTH=4, DEFAULT="UDEC"), ACCESS="R"),
  SEPARATOR(TEXTNAME=" arch "),
  FIELD[19:16] (NAME="Architecture", TYPE=tArchitecture, ACCESS="R")
}
  </definition>
</displaytype>

<displaytype>
  <name>CacheType</name>
  <requires></requires>
  <definition>
TYPEDEF tCacheSize ENUM(WIDTH=4)
{
  "0.5KB" = 0,
  "0.75KB"= 1,
  "1KB"   = 2,
  "1.5KB" = 3,
  "2KB"   = 4,
  "3KB"   = 5,
  "4KB"   = 6,
  "6KB"   = 7,
  "8KB"   = 8,
  "12KB"  = 9,
  "16KB"  = 10,
  "24KB"  = 11,
  "32KB"  = 12,
  "48KB"  = 13,
  "64KB"  = 14,
  "96KB"  = 15
}

TYPEDEF tCacheAssoc ENUM(WIDTH=4)
{
 "1-way"   = 0,
 "Absent"  = 1,
 "2-way"   = 2,
 "3-way"   = 3,
 "4-way"   = 4,
 "6-way"   = 5,
 "8-way"   = 6,
 "12-way"  = 7,
 "16-way"  = 8,
 "24-way"  = 9,
 "32-way"  = 10,
 "48-way"  = 11,
 "64-way"  = 12,
 "96-way"  = 13,
 "128-way" = 14,
 "192-way" = 15
}

TYPEDEF tCacheLine ENUM(WIDTH=2)
{
 "2"  = 0,
 "4"  = 1,
 "8"  = 2,
 "16" = 3
}

TYPEDEF tCacheType2825 ENUM(WIDTH=4, DEFAULT="Unknown type")
{
  "Write-through" = 0,
  "Write-back (No reg 7)" = 1,
  "Write-back" = 2,
  "Write-back Lock-down" = 5,
  "Write-back Lock-down(A)" = 6,
  "Write-back Lock-down(B)" = 7,
  "Write-back Lock-down(C)" = 14
}

TYPEDEF CacheType(NAME="Cache type", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[28:25] (NAME="Cache type", TYPE=tCacheType2825, ACCESS="R"),
  SEPARATOR(TEXTNAME=" "),
  FIELD[24] (NAME="Separate/Unified", TYPE=FLAG(SET="", UNSET="Unified "), ACCESS="R"),
  GROUP(NAME="Data cache")
  {
    SEPARATOR(TEXTNAME="Data: "),
    FIELD[20:18],[14] (NAME="Size", TYPE=tCacheSize, ACCESS="R"),
    SEPARATOR(TEXTNAME=","),
    FIELD[17:15],[14] (NAME="Associativity", TYPE=tCacheAssoc, ACCESS="R"),
    SEPARATOR(TEXTNAME=","),
    FIELD[13:12] (NAME="Words per line", TYPE=tCacheLine, ACCESS="R"),
    SEPARATOR(TEXTNAME="wpl")
  },
  SEPARATOR(TEXTNAME=" "),
  GROUP(NAME="Instruction cache")
  {
    SEPARATOR(TEXTNAME="Instruction: "),
    FIELD[8:6],[2] (NAME="Size", TYPE=tCacheSize, ACCESS="R"),
    SEPARATOR(TEXTNAME=","),
    FIELD[5:3],[2] (NAME="Associativity", TYPE=tCacheAssoc, ACCESS="R"),
    SEPARATOR(TEXTNAME=","),
    FIELD[1:0] (NAME="Words per line", TYPE=tCacheLine, ACCESS="R"),
    SEPARATOR(TEXTNAME="wpl")
  }
}
  </definition>
</displaytype>

<displaytype>
  <name>CP15Control_710</name>
  <requires></requires>
  <definition>

TYPEDEF CP15Control_710(NAME="CP15 Control (ARM710T)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:10](NAME="",TYPE=RESERVED(WIDTH=22), ACCESS="Z"),
  FIELD[9](NAME="ROM protection", TYPE=FLAG(SET="R", UNSET="r")),
  FIELD[8](NAME="System protection", TYPE=FLAG(SET="S", UNSET="s")),
  FIELD[7](NAME="Big-endian", TYPE=FLAG(SET="B", UNSET="b")),
  FIELD[6:4](NAME="",TYPE=RESERVED(WIDTH=3),ACCESS="1"),
  FIELD[3](NAME="Write buffer enable", TYPE=FLAG(SET="W", UNSET="w")),
  FIELD[2](NAME="Data cache enable", TYPE=FLAG(SET="C", UNSET="c")),
  FIELD[1](NAME="Alignment", TYPE=FLAG(SET="A", UNSET="a")),
  FIELD[0](NAME="MMU enable", TYPE=FLAG(SET="M", UNSET="m"))
}
  </definition>
</displaytype>

<displaytype>
  <name>CP15Control_720</name>
  <requires></requires>
  <definition>

TYPEDEF CP15Control_720(NAME="CP15 Control (ARM720T)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:14](NAME="",TYPE=RESERVED(WIDTH=18), ACCESS="Z"),
  FIELD[13](NAME="High vectors", TYPE=FLAG(SET="V", UNSET="v")),
  FIELD[12:10](NAME="",TYPE=RESERVED(WIDTH=3),ACCESS="0"),
  FIELD[9](NAME="ROM protection", TYPE=FLAG(SET="R", UNSET="r")),
  FIELD[8](NAME="System protection", TYPE=FLAG(SET="S", UNSET="s")),
  FIELD[7](NAME="Big-endian", TYPE=FLAG(SET="B", UNSET="b")),
  FIELD[6:4](NAME="",TYPE=RESERVED(WIDTH=3),ACCESS="1"),
  FIELD[3](NAME="Write buffer enable", TYPE=FLAG(SET="W", UNSET="w")),
  FIELD[2](NAME="Data cache enable", TYPE=FLAG(SET="C", UNSET="c")),
  FIELD[1](NAME="Alignment", TYPE=FLAG(SET="A", UNSET="a")),
  FIELD[0](NAME="MMU enable", TYPE=FLAG(SET="M", UNSET="m"))
}
  </definition>
</displaytype>

<displaytype>
  <name>CP15Control_740</name>
  <requires></requires>
  <definition>
TYPEDEF t740Split ENUM(WIDTH=3)
{
 "Mixed" = 0,
 "LockBank0" = 2,
 "LockBanks10" = 4,
 "LockBanks210" = 6,
 "DDDI" = 3,
 "DDII" = 5,
 "DIII" = 7,
 "Reserved" = 1

}

TYPEDEF t740Load ENUM(WIDTH=3, Default="")
{
 "" = 0,
 "LoadBank0" = 1,
 "LoadBank1" = 3,
 "LoadBank2" = 5,
 "LoadBank3" = 7
}

TYPEDEF CP15Control_740(NAME="CP15 Control (ARM740T)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:30](NAME="",TYPE=RESERVED(WIDTH=2), ACCESS="Z"),
  FIELD[29:27](NAME="Force bank", TYPE=t740Load),
  SEPARATOR(TEXTNAME="_"),
  FIELD[26:24](NAME="Bank locking/allocation", TYPE=t740Split),
  SEPARATOR(TEXTNAME="_"),
  FIELD[23:8](NAME="",TYPE=RESERVED(WIDTH=16), ACCESS="Z"),
  FIELD[7](NAME="Big-endian", TYPE=FLAG(SET="B", UNSET="b")),
  FIELD[6:4](NAME="",TYPE=RESERVED(WIDTH=3),ACCESS="Z"),
  FIELD[3](NAME="Write buffer enable", TYPE=FLAG(SET="W", UNSET="w")),
  FIELD[2](NAME="Data cache enable", TYPE=FLAG(SET="C", UNSET="c")),
  FIELD[1](NAME="",TYPE=RESERVED(WIDTH=1),ACCESS="Z"),
  FIELD[0](NAME="Protection unit enable", TYPE=FLAG(SET="M", UNSET="m"))
}
  </definition>
</displaytype>

<displaytype>
  <name>CP15Control_920</name>
  <requires></requires>
  <definition>
TYPEDEF t920Asynch ENUM(WIDTH=2)
{
 "FastBus"  = 0,
 "Synch"  = 1,
 "Reserved"  = 2,
 "Asynch" = 3
}

TYPEDEF CP15Control_920(NAME="CP15 Control (ARM920T)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:30](NAME="Clocking", TYPE=t920Asynch),
  SEPARATOR(TEXTNAME="_"),
  FIELD[29:15](NAME="",TYPE=RESERVED(WIDTH=15), ACCESS="Z"),
  FIELD[14](NAME="Round robin", TYPE=FLAG(SET="RR", UNSET="rr")),
  FIELD[13](NAME="High vectors", TYPE=FLAG(SET="V", UNSET="v")),
  FIELD[12](NAME="I-cache enable", TYPE=FLAG(SET="I", UNSET="i")),
  FIELD[11:10](NAME="",TYPE=RESERVED(WIDTH=2),ACCESS="0"),
  FIELD[9](NAME="ROM protection", TYPE=FLAG(SET="R", UNSET="r")),
  FIELD[8](NAME="System protection", TYPE=FLAG(SET="S", UNSET="s")),
  FIELD[7](NAME="Big-endian", TYPE=FLAG(SET="B", UNSET="b")),
  FIELD[6:3](NAME="",TYPE=RESERVED(WIDTH=4),ACCESS="1"),
  FIELD[2](NAME="Data cache enable", TYPE=FLAG(SET="C", UNSET="c")),
  FIELD[1](NAME="Alignment", TYPE=FLAG(SET="A", UNSET="a")),
  FIELD[0](NAME="MMU enable", TYPE=FLAG(SET="M", UNSET="m"))
}
  </definition>
</displaytype>

<displaytype>
  <name>CP15Control_922</name>
  <requires></requires>
  <definition>
TYPEDEF t922Asynch ENUM(WIDTH=2)
{
 "FastBus"  = 0,
 "Synch"  = 1,
 "Reserved"  = 2,
 "Asynch" = 3
}

TYPEDEF CP15Control_922(NAME="CP15 Control (ARM922T)", CLASS="System") COMPOSITE(WIDTH=32)
{
  FIELD[31:30](NAME="Clocking", TYPE=t922Asynch),
  SEPARATOR(TEXTNAME="_"),
  FIELD[29:15](NAME="",TYPE=RESERVED(WIDTH=15), ACCESS="Z"),
  FIELD[14](NAME="Round robin", TYPE=FLAG(SET="RR", UNSET="rr")),
  FIELD[13](NAME="High vectors", TYPE=FLAG(SET="V", UNSET="v")),
  FIELD[12](NAME="I-cache enable", TYPE=FLAG(SET="I", UNSET="i")),
  FIELD[11:10](NAME="",TYPE=RESERVED(WIDTH=2),ACCESS="0"),
  FIELD[9](NAME="ROM protection", TYPE=FLAG(SET="R", UNSET="r")),
  FIELD[8](NAME="System protection", TYPE=FLAG(SET="S", UNSET="s")),
  FIELD[7](NAME="Big-endian", TYPE=FLAG(SET="B", UNSET="b")),
  FIELD[6:3](NAME="",TYPE=RESERVED(WIDTH=4),ACCESS="1"),
  FIELD[2](NAME="Data cache enable", TYPE=FLAG(SET="C", UNSET="c")),

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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