?? top.mfd
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MDF Database: version 1.0
MDF_INFO | top | XC95144XL-5-TQ144
MACROCELL | 7 | 14 | can_dir_OBUF
ATTRIBUTES | 8815554 | 0
OUTPUTMC | 17 | 5 | 13 | 6 | 6 | 5 | 14 | 6 | 7 | 6 | 9 | 5 | 16 | 6 | 8 | 3 | 1 | 6 | 12 | 3 | 4 | 6 | 10 | 3 | 5 | 6 | 15 | 3 | 7 | 6 | 11 | 3 | 8 | 3 | 13
INPUTS | 4 | cpu_noe | delay_can<2>/delay_can<2>_RSTF__$INT | can_state_FFd2 | can_state_FFd1
INPUTMC | 3 | 3 | 9 | 3 | 17 | 3 | 11
INPUTP | 1 | 72
EQ | 4 |
can_rd.D = cpu_noe;
!can_rd.CLK = sysclk; // GCK
can_rd.AP = !delay_can<2>/delay_can<2>_RSTF__$INT;
can_rd.CE = can_state_FFd2 & !can_state_FFd1;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 7 | 9 | can_ale_OBUF
ATTRIBUTES | 8684370 | 0
INPUTS | 6 | delay_can<0> | delay_can<1> | delay_can<2> | delay_can<2>/delay_can<2>_RSTF__$INT | can_state_FFd2 | can_state_FFd1
INPUTMC | 6 | 3 | 15 | 3 | 14 | 3 | 10 | 3 | 9 | 3 | 17 | 3 | 11
EQ | 4 |
!can_ale.D = !delay_can<0> & delay_can<1> & !delay_can<2>;
!can_ale.CLK = sysclk; // GCK
can_ale.AR = !delay_can<2>/delay_can<2>_RSTF__$INT;
can_ale.CE = !can_state_FFd2 & !can_state_FFd1;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 7 | 12 | cana_ncs_OBUF
ATTRIBUTES | 8684482 | 0
INPUTS | 7 | cpu_addr23 | delay_can<2>/delay_can<2>_RSTF__$INT | can_state_FFd2 | can_state_FFd1 | delay_can<0> | delay_can<1> | delay_can<2>
INPUTMC | 6 | 3 | 9 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 10
INPUTP | 1 | 97
EQ | 5 |
cana_ncs.D = cpu_addr23;
!cana_ncs.CLK = sysclk; // GCK
cana_ncs.AP = !delay_can<2>/delay_can<2>_RSTF__$INT;
cana_ncs.CE = !can_state_FFd2 & !can_state_FFd1 & !delay_can<0> &
delay_can<1> & !delay_can<2>;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 7 | 13 | canb_ncs_OBUF
ATTRIBUTES | 8684482 | 0
INPUTS | 7 | cpu_addr23 | delay_can<2>/delay_can<2>_RSTF__$INT | can_state_FFd2 | can_state_FFd1 | delay_can<0> | delay_can<1> | delay_can<2>
INPUTMC | 6 | 3 | 9 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 10
INPUTP | 1 | 97
EQ | 5 |
canb_ncs.D = !cpu_addr23;
!canb_ncs.CLK = sysclk; // GCK
canb_ncs.AP = !delay_can<2>/delay_can<2>_RSTF__$INT;
canb_ncs.CE = !can_state_FFd2 & !can_state_FFd1 & !delay_can<0> &
delay_can<1> & !delay_can<2>;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 7 | 16 | can_wr_OBUF
ATTRIBUTES | 4621190 | 0
OUTPUTMC | 1 | 7 | 16
INPUTS | 8 | can_wr | can_state_FFd2 | can_state_FFd1 | cpu_nwe | delay_can<0> | delay_can<1> | delay_can<2> | delay_can<2>/delay_can<2>_RSTF__$INT
INPUTMC | 7 | 7 | 16 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 10 | 3 | 9
INPUTP | 1 | 69
EQ | 8 |
can_wr.T = can_wr & can_state_FFd2 & !can_state_FFd1 &
!cpu_nwe
# !can_wr & can_state_FFd2 & !can_state_FFd1 &
cpu_nwe
# !can_wr & !can_state_FFd2 & can_state_FFd1 &
delay_can<0> & delay_can<1> & !delay_can<2>;
!can_wr.CLK = sysclk; // GCK
can_wr.AP = !delay_can<2>/delay_can<2>_RSTF__$INT;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 4 | 5 | led_buf
ATTRIBUTES | 4489986 | 0
OUTPUTMC | 1 | 4 | 6
INPUTS | 8 | led_count<18> | led_count<19> | led_count<20> | led_count<13> | led_count<16> | led_count<21> | led_count<14> | speaker_OBUF$BUF0.EXP
INPUTMC | 8 | 0 | 15 | 1 | 13 | 1 | 11 | 2 | 15 | 0 | 7 | 1 | 0 | 1 | 5 | 4 | 4
EXPORTS | 1 | 4 | 6
IMPORTS | 1 | 4 | 4
EQ | 16 |
!test_led.T = !led_count<18>
# !led_count<19>
# !led_count<20>
;Imported pterms FB5_5
# !led_count<21>
# !led_count<16> & !led_count<17>
# !led_count<11> & !led_count<12> & !led_count<13> &
!led_count<14> & !led_count<15> & !led_count<17>
# !led_count<10> & !led_count<12> & !led_count<13> &
!led_count<14> & !led_count<15> & !led_count<17> & !led_count<8> &
!led_count<9>;
test_led.CLK = sysclk; // GCK
led_buf.EXP = led_count<13> & led_count<16> & led_count<18> &
led_count<19> & led_count<20> & led_count<21>
# led_count<14> & led_count<16> & led_count<18> &
led_count<19> & led_count<20> & led_count<21>
GLOBALS | 1 | 2 | sysclk
MACROCELL | 3 | 0 | can_ad_0_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | can_en_addr | cpu_addr<0> | cpu_data<8>.PIN | cpu_data<0>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 3 | 108 | 136 | 87
EQ | 4 |
can_ad<0> = !can_en_addr & cpu_addr<0>
# cpu_data<8>.PIN & cpu_addr<0>
# can_en_addr & cpu_data<0>.PIN & !cpu_addr<0>;
can_ad<0>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 15 | can_ad_1_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<1> | cpu_addr<0> | cpu_data<1>.PIN | cpu_data<9>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 107 | 108 | 88 | 139
EQ | 4 |
can_ad<1> = !can_en_addr & cpu_addr<1>
# can_en_addr & cpu_addr<0> & cpu_data<9>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<1>.PIN;
can_ad<1>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 8 | can_ad_2_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<2> | cpu_addr<0> | cpu_data<10>.PIN | cpu_data<2>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 106 | 108 | 140 | 89
EQ | 4 |
can_ad<2> = !can_en_addr & cpu_addr<2>
# can_en_addr & cpu_addr<0> & cpu_data<10>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<2>.PIN;
can_ad<2>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 9 | can_ad_3_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<3> | cpu_addr<0> | cpu_data<3>.PIN | cpu_data<11>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 105 | 108 | 90 | 141
EQ | 4 |
can_ad<3> = !can_en_addr & cpu_addr<3>
# can_en_addr & cpu_addr<0> & cpu_data<11>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<3>.PIN;
can_ad<3>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 7 | can_ad_4_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<4> | cpu_addr<0> | cpu_data<12>.PIN | cpu_data<4>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 104 | 108 | 143 | 91
EQ | 4 |
can_ad<4> = !can_en_addr & cpu_addr<4>
# can_en_addr & cpu_addr<0> & cpu_data<12>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<4>.PIN;
can_ad<4>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 5 | can_ad_5_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<5> | cpu_addr<0> | cpu_data<13>.PIN | cpu_data<5>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 103 | 108 | 144 | 92
EQ | 4 |
can_ad<5> = !can_en_addr & cpu_addr<5>
# can_en_addr & cpu_addr<0> & cpu_data<13>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<5>.PIN;
can_ad<5>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 3 | can_ad_6_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<6> | cpu_addr<0> | cpu_data<14>.PIN | cpu_data<6>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 102 | 108 | 145 | 93
EQ | 4 |
can_ad<6> = !can_en_addr & cpu_addr<6>
# can_en_addr & cpu_addr<0> & cpu_data<14>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<6>.PIN;
can_ad<6>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 5 | 4 | can_ad_7_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | can_en_addr | cpu_addr<7> | cpu_addr<0> | cpu_data<15>.PIN | cpu_data<7>.PIN | can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST
INPUTMC | 2 | 3 | 16 | 3 | 13
INPUTP | 4 | 98 | 108 | 146 | 95
EQ | 4 |
can_ad<7> = !can_en_addr & cpu_addr<7>
# can_en_addr & cpu_addr<0> & cpu_data<15>.PIN
# can_en_addr & !cpu_addr<0> & cpu_data<7>.PIN;
can_ad<7>.OE = can_ad_7_IOBUFE/can_ad_7_IOBUFE_TRST;
MACROCELL | 3 | 16 | can_en_addr
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 10 | 3 | 0 | 5 | 15 | 5 | 8 | 5 | 9 | 5 | 7 | 5 | 5 | 5 | 3 | 5 | 4 | 3 | 16 | 3 | 13
INPUTS | 4 | can_state_FFd2 | can_state_FFd1 | can_en_addr | delay_can<2>/delay_can<2>_RSTF__$INT
INPUTMC | 4 | 3 | 17 | 3 | 11 | 3 | 16 | 3 | 9
EQ | 4 |
can_en_addr.D = can_en_addr & can_state_FFd1
# can_state_FFd2 & !can_state_FFd1;
!can_en_addr.CLK = sysclk; // GCK
can_en_addr.AP = !delay_can<2>/delay_can<2>_RSTF__$INT;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 3 | 17 | can_state_FFd2
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 13 | 7 | 14 | 7 | 9 | 7 | 12 | 7 | 13 | 7 | 16 | 3 | 16 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 10 | 3 | 12 | 5 | 11
INPUTS | 6 | can_state_FFd2 | can_state_FFd1 | delay_can<0> | delay_can<1> | delay_can<2> | delay_can<2>/delay_can<2>_RSTF__$INT
INPUTMC | 6 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 10 | 3 | 9
EQ | 7 |
can_state_FFd2.D = can_state_FFd2 & can_state_FFd1
# can_state_FFd1 & delay_can<0> & delay_can<1> &
!delay_can<2>
# !can_state_FFd2 & !can_state_FFd1 & !delay_can<0> &
delay_can<1> & !delay_can<2>;
!can_state_FFd2.CLK = sysclk; // GCK
can_state_FFd2.AR = !delay_can<2>/delay_can<2>_RSTF__$INT;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 3 | 11 | can_state_FFd1
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 12 | 7 | 14 | 7 | 9 | 7 | 12 | 7 | 13 | 7 | 16 | 3 | 16 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 12 | 5 | 11
INPUTS | 3 | can_state_FFd2 | can_state_FFd1 | delay_can<2>/delay_can<2>_RSTF__$INT
INPUTMC | 3 | 3 | 17 | 3 | 11 | 3 | 9
EQ | 3 |
!can_state_FFd1.D = !can_state_FFd2 & !can_state_FFd1;
!can_state_FFd1.CLK = sysclk; // GCK
can_state_FFd1.AR = !delay_can<2>/delay_can<2>_RSTF__$INT;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 3 | 15 | delay_can<0>
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 8 | 7 | 9 | 7 | 12 | 7 | 13 | 7 | 16 | 3 | 17 | 3 | 15 | 3 | 14 | 3 | 10
INPUTS | 6 | can_state_FFd2 | can_state_FFd1 | delay_can<0> | delay_can<1> | delay_can<2> | delay_can<2>/delay_can<2>_RSTF__$INT
INPUTMC | 6 | 3 | 17 | 3 | 11 | 3 | 15 | 3 | 14 | 3 | 10 | 3 | 9
EQ | 5 |
!delay_can<0>.T = can_state_FFd2
# !can_state_FFd1 & !delay_can<0> & delay_can<1> &
!delay_can<2>;
!delay_can<0>.CLK = sysclk; // GCK
delay_can<0>.AR = !delay_can<2>/delay_can<2>_RSTF__$INT;
GLOBALS | 1 | 2 | sysclk
MACROCELL | 3 | 14 | delay_can<1>
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 8 | 7 | 9 | 7 | 12 | 7 | 13 | 7 | 16 | 3 | 17 | 3 | 15 | 3 | 14 | 3 | 10
INPUTS | 6 | can_state_FFd2 | delay_can<0> | can_state_FFd1 | delay_can<1> | delay_can<2> | delay_can<2>/delay_can<2>_RSTF__$INT
INPUTMC | 6 | 3 | 17 | 3 | 15 | 3 | 11 | 3 | 14 | 3 | 10 | 3 | 9
EQ | 5 |
delay_can<1>.T = !can_state_FFd2 & delay_can<0>
# !can_state_FFd2 & !can_state_FFd1 & delay_can<1> &
!delay_can<2>;
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