-- 庫(kù)聲明
library IEEE;
use IEEE.STD_LOGIC_1164.all; 

-- 包聲明
PACKAGE UART_PACKAGE IS	 
	
-- 信號(hào)監(jiān)測(cè)器狀態(tài)
type dt_state is 
(
dt_unlock,			-- 未鎖定狀態(tài)
dt_lock 			-- 鎖定狀態(tài)
);	 

-- UART狀態(tài)
type UART_STATE is
( 
UART_IDLE,
UART_LOAD,
UART_SEND,	
UART_END_SEND,
UART_RECV,
UART_END_RECV
);

-- 計(jì)數(shù)器計(jì)數(shù)范圍
type BD_COUNT is range 65535 downto 0;

-- 9600波特率對(duì)應(yīng)參數(shù)
constant BD9600_FPC : BD_COUNT := 5208;
constant BD9600_HPC : BD_COUNT := 2604;

-- 波特率測(cè)試參數(shù)
constant BDTEST_FPC : BD_COUNT := 10;
constant BDTEST_HPC : BD_COUNT := 5;

-- 奇偶校驗(yàn)規(guī)則定義
type PARITY is
(
NONE,		-- 無(wú)奇偶校驗(yàn)
ODD,		-- 奇校驗(yàn)
EVEN		-- 偶校驗(yàn)
);

-- 類型聲明
type test_vectors is array (0 to 10) of std_logic;
-- 無(wú)奇偶校驗(yàn)測(cè)試序列
constant test_si_none : test_vectors := 
('0', '1', '0', '1', '0', '1', '0', '1', '0', others => '1');
-- 奇校驗(yàn)測(cè)試序列
constant test_si_odd : test_vectors := 
('0', '1', '0', '1', '0', '1', '1', '1', '0', '1', others => '1');
-- 偶校驗(yàn)測(cè)試序列
constant test_si_even : test_vectors := 
('0', '1', '0', '1', '0', '1', '0', '1', '0', '0', others => '1');

-- 函數(shù)聲明
function MultiXOR(
	din : in std_logic_vector )
  	return std_logic;

END UART_PACKAGE;

-- 包體
PACKAGE BODY UART_PACKAGE IS

-- 函數(shù)實(shí)現(xiàn)
function MultiXOR(
	din : in std_logic_vector )
  	return std_logic is
	variable check : std_logic;
begin
	check := din(din'LOW);
	for i in 1 to (din'HIGH) loop
		check := check xor din(i);
	end loop;
		
	return check;
end MultiXOR;

END UART_PACKAGE;