/******************************************************************************
*                                                                             *
*        **********                                                           *
*       ************                                                          *
*      ***        ***                                                         *
*     ***    ++    ***                                                        *
*     ***   +  +   ***                      CHIPCON                           *
*     ***   +                                                                 *
*     ***   +  +   ***                                                        *
*     ***    ++    ***                                                        *
*      ***        ***                                                         *
*       ************                                                          *
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*******************************************************************************

Filename:     rfConfig.c
Target:       cc2511
Author:       EFU
Revised:      20/6-2006
Revision:     x.x
******************************************************************************/
#include "hal.h"

#define FSTEST    _XREGDF20
#define PTEST     _XREGDF21
#define AGCTEST   _XREGDF22
#define TEST2     _XREGDF23
#define TEST1     _XREGDF24
#define TEST0     _XREGDF25


//-----------------------------------------------------------------------------
// See hal.h for a description of this function.
//-----------------------------------------------------------------------------
BOOL halRfConfig(UINT32 frequency)
{
   BOOL status;

   //Turning on crystal oscillator
   SET_MAIN_CLOCK_SOURCE(CRYSTAL);

   // Setting the frequency
   halRfSetRadioFrequency(frequency);



   if (frequency > 2400000)
   {
// 250kbps FSK setup (for other data rates or modulation formats, please see SmartRF Studio).
      // Dynamic packet length and append status
      PKTLEN = 0xFF;
      PKTCTRL0 = 0x05;
      PKTCTRL1 = 0x04;

      // IF frequency
      FSCTRL1 = 0x0A;
      FSCTRL0 = 0x00;

      // filter BW, data rate,
      MDMCFG4 = 0x1D;
      MDMCFG3 = 0x55;

      // Modulation format, detection level
      MDMCFG2 = 0x73;
      MDMCFG1 = 0x23;
      MDMCFG0 = 0xF8;

      // Deviation setting
      DEVIATN = 0x00;

      // Calibration synth
      MCSM0 = 0x07;
      MCSM1 = 0x30;
      MCSM0 = 0x10;

      // Frequency offset compensation configuration
      FOCCFG = 0x1D;

      // Bit synchronization
      BSCFG = 0x1C;

      // AGC settings
      AGCCTRL2	= 0xC7;
      AGCCTRL1	= 0x00;
      AGCCTRL0	= 0xB2;

      // Front end settings (from SmartRf04)
      FREND1 = 0xB6;
      FREND0 = 0x10;

      // Synth calibration
      FSCAL3 = 0xEA;
      FSCAL2 = 0x0A;
      FSCAL1 = 0x00;
      FSCAL0 = 0x11;

      // From Smart RF Studio
      FOCCFG = 0x1D;
      BSCFG = 0x1C;
      FSTEST = 0x59;
      PTEST = 0x7F;
      AGCTEST = 0x3F;
      TEST2 = 0x88;
      TEST1 = 0x31;
      TEST0 = 0x0B;


      // Output power
      PA_TABLE0 = 0xFF;

      // Calibrating synth.
      SIDLE();
      SCAL();
      while(MARCSTATE != 0x01);

      INT_SETFLAG(INUM_RFTXRX,INT_CLR);

      status = TRUE;
   }
   else {
      status = FALSE;
   }

   return status;
}