?? epp_interface.vhd
字號:
---HPI與EPP接口轉換模塊的設計
---本設計以EPP的時序為基礎，要求以host能夠通過HPI接口可訪問DSP的存儲空間
--chang time:2005.4.21
--chang part: entity:read
---HPI與EPP接口轉換模塊的設計
---本設計以EPP的時序為基礎，要求以host能夠通過HPI接口可訪問DSP的存儲空間
--程序名稱 ：HPI_EPP
--編譯環境 ：ISE5.2
--程序版本 ：1.0
--主體設計者 : 吳慶洪
--程序編制調試：李思偉
--設計時間 :2005.4
-------------------------------------------------------------------------------
--entity:count16
--founction:產生16進制的進位脈沖，作為HPI接口控制信號。
--signal:nAstrb,nDstrb,byteflage,HHWIL,HCNTL0,HCNTL1;
--實體count16作為epp_interface的子器件。
--time:2005.4
--chang time:2005.4.1
--------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity count16 is
port (
nAstrb: in STD_LOGIC; --地址選通信號，作為計數器的清零信號
nDstrb: in STD_LOGIC; --數據選通信號，作為計數器的計數脈沖
Q0: out STD_LOGIC;
Q1: out STD_LOGIC;
Q2: out STD_LOGIC;
Q3: out STD_LOGIC
);
end count16;
architecture count16_arch of count16 is
signal cnt :std_logic_vector(3 downto 0);
signal hostdata:std_logic_vector(15 downto 0);
begin
COUNT:process (nAstrb,nDstrb)
begin
if(nAstrb='0') then
cnt<="0000";
elsif(nDstrb'event and nDstrb='0') then
if(cnt="1011")then
cnt<="1000";
else
cnt<=cnt+'1';
end if;
Q1<=cnt(1);
Q2<=cnt(2);
Q3<=cnt(3);
Q0<=cnt(0);--after 100ns; --用于鎖存從host輸出的八位數據，延時使Q0的邊沿在數據有效時發生
end if;
end process COUNT;
-- <<enter your statements here>>
end count16_arch;
-------------------------------------------------------------------------------------------------------
--entity:latchl
--founction:HPI口寫DSP控制寄存器時，nWrite='0'時，用于鎖存低8位的PD信號，在Q0的上升沿送給HD（7 DOWNTO 0）。
--signal:PD(7downto 0),HD(7 downto 0),Q0,nWrite;
--實體latchl作為epp_interface的子器件。
--time:2005.4
-------------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
entity latchl is
port (
d: in STD_LOGIC_VECTOR (7 downto 0);
q: out STD_LOGIC_VECTOR (7 downto 0);
clk: in STD_LOGIC;
oe: in STD_LOGIC
);
end latchl;
architecture latchl_arch of latchl is
signal qint:std_logic_vector(7 downto 0);
begin
process(clk,d,oe)
begin
if(oe='0')then
if(clk'event and clk='1')then --clk的上升沿鎖存低八位數據
qint(7 downto 0)<=d;
end if;
else
qint<="ZZZZZZZZ";
end if;
end process;
q<=qint when (oe='0') --HPI寫時序，將數據送入HD0-HD7
else "ZZZZZZZZ";
-- <<enter your statements here>>
end latchl_arch;
-------------------------------------------------------------------------------------------------------
--entity:latchh
--founction:HPI口寫DSP控制寄存器時，nWrite='0'時，用于鎖存低8位的PD信號，在Q0的下降沿送給HD（15 downto 8）。
--signal:PD(7downto 0),HD(15 downto 8),Q0,nWrite;
--實體latchh作為epp_interface的子器件。
--time:2005.4
-------------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
entity latchh is
port (
d: in STD_LOGIC_VECTOR (7 downto 0);
q: out STD_LOGIC_VECTOR (7 downto 0);
clk: in STD_LOGIC;
oe: in STD_LOGIC
);
end latchh;
architecture latchh_arch of latchh is
signal qint:std_logic_vector(7 downto 0);
begin
process(clk,d)
begin
if(oe='0')then
if(clk'event and clk='0')then --clk的下降沿鎖存高八位數據
qint<=d;
end if;
else
qint<="ZZZZZZZZ";
end if;
end process;
q<=qint when (oe='0') --HPI寫時序，將數據送入HD8-HD15
else "ZZZZZZZZ";
-- <<enter your statements here>>
end latchh_arch;
-----------------------------------------------------------------------------------------------------
--entity:readbuffer
--founction:HPI口讀DSPMemory時，nWrite='1'時用于緩沖HD的信號，在Q0的上升沿送HD（7 DOWNTO 0）給PD，Q0的下降沿送HD（15 DOWNTO 8）給PD。
--signal:PD(7downto 0),HD(7 downto 0),Q0,nWrite;
--實體latchl作為epp_interface的子器件。
--time:2005.4
------------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
entity read is
port (
datain: in STD_LOGIC_VECTOR (15 downto 0);
dataout: out STD_LOGIC_VECTOR (7 downto 0);
oe: in STD_LOGIC;
clk: in STD_LOGIC;
Q0: in std_logic
);
end read;
architecture read_arch of read is
signal bufferdata:std_logic_vector(15 downto 0);
--signal flage:std_logic;
begin
process(oe,clk,datain,Q0)
begin
if(oe='1'and Q0='1')then --讀允許且HPI讀時序時，HPI數據送入CPLD（）
if(clk'event and clk='1')then --CLK的上升沿鎖存HPI口數據
bufferdata<=datain;
--flage<=not flage;
end if;
--else
-- bufferdata<=bufferdata; --否則緩存維持上次讀取的數據
--flage<='Z';
end if;
end process;
dataout<=bufferdata(7 downto 0) when(Q0='1'and oe='1') --第一個CLK的上升沿，讀取低八位
else bufferdata(15 downto 8)when(Q0='0'and oe='1') --第二個CLK的下降沿，讀取高八位
else "ZZZZZZZZ";
-- <<enter your statements here>>
end read_arch;
----------------------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------
---read and write control
--讀寫信號鎖存
--
---------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
entity rwcontrol is
port (
clk: in STD_LOGIC;
nWrite: in STD_LOGIC;
rwselect: out STD_LOGIC
);
end rwcontrol;
architecture rwcontrol_arch of rwcontrol is
begin
process(clk)
begin
if(clk'event and clk='0')then
rwselect<=nWrite;
end if;
end process;
-- <<enter your statements here>>
end rwcontrol_arch;
---------------------------------------------------------------------------------------------------
--entity: HPI_EPP
--founction:HPI與EPP接口轉換的主控函數。
--signal:PD(7downto 0),HD(7 downto 0),nWrite,nAstrb,nDstrb,byteflage,HHWIL,HCNTL0,HCNTL1,HCS;
--
--time:2005.4
--
--
--
--
-------------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity HPI_EPP is
port (
nWrite: in STD_LOGIC; --EPP讀寫控制信號，‘0’--寫；‘1’--讀
nAstrb: in STD_LOGIC; --EPP地址選通信號，作為計數器的清零信號
nDstrb: in STD_LOGIC; --EPP的數據選通信號
byteflage: out STD_LOGIC; --數據讀寫高低字節的標志‘1’低，‘0’高
HHWIL: out STD_LOGIC; --HPI讀寫高低半字的控制信號，‘0’低，‘1’高
HCNTL0: out STD_LOGIC; --訪問HPI內部寄存器HPIC、HPIA、HPID的控制信號
HCNTL1: out STD_LOGIC; --以及訪問HPID的方式
HPI_RW: out STD_LOGIC; --HPI讀寫控制信號
PD:inout STD_LOGIC_VECTOR(7 downto 0); --EPP數據地址總線
HD:inout STD_LOGIC_VECTOR(15 downto 0); --HPI數據總線
datatest:out std_logic_vector(15 downto 0);
sclk:inout std_logic;
HCS: out STD_LOGIC --HPI選通信號，下降沿鎖存HPI的控制信號
);
end HPI_EPP;
architecture HPI_EPP_arch of HPI_EPP is
component count16 is --元件聲明
port (
nAstrb: in STD_LOGIC;
nDstrb: in STD_LOGIC;
Q0: out STD_LOGIC;
Q1: out STD_LOGIC;
Q2: out STD_LOGIC;
Q3: out STD_LOGIC
);
end component;
component latchl is
port (
d: in STD_LOGIC_VECTOR (7 downto 0);
q: out STD_LOGIC_VECTOR (7 downto 0);
clk: in STD_LOGIC;
oe: in STD_LOGIC
);
end component;
component latchh is
port (
d: in STD_LOGIC_VECTOR (7 downto 0);
q: out STD_LOGIC_VECTOR (7 downto 0);
clk: in STD_LOGIC;
oe: in STD_LOGIC
);
end component;
component read is
port (
datain: in STD_LOGIC_VECTOR (15 downto 0);
dataout: out STD_LOGIC_VECTOR (7 downto 0);
oe:in std_logic;
clk:in std_logic;
Q0:in std_logic
);
end component;
component rwcontrol is
port (
clk: in STD_LOGIC;
nwrite:in std_logic;
rwselect: out STD_LOGIC
);
end component ;
signal Q0,Q1,Q2,Q3:STD_LOGIC;
signal rwselect:std_logic;
signal portdata:std_logic_vector(7 downto 0);
-- signal sclk:std_logic;
begin
byteflage<=Q0;
HPI_RW<=nWrite;
HHWIL<=Q1;
HCNTL0<=Q2;
HCNTL1<=Q3;
HCS<=(not Q0) or nDstrb;
process(nDstrb)
begin
if(sclk'event and sclk='1')then
--sclk<=not sclk;
datatest<=HD;
end if;
end process;
sclk<=nDstrb and Q0;-- after 100ns;
readwrite:rwcontrol port map(nDstrb,nWrite,rwselect);
CNT1:COUNT16 PORT MAP(nAstrb,nDstrb,Q0,Q1,Q2,Q3);
latch1:latchh port map(PD,HD(15 downto 8),Q0,rwselect);
latch0:latchl port map(PD,HD(7 downto 0),Q0,rwselect);
-- B1:block (nWrite='1')
-- begin
bufferread:read port map(HD(15 downto 0),PD,nWrite,sclk,Q0);
-- end block B1;
end HPI_EPP_arch;
------------------------------------------------------------------------------------------
---程序結束！
---程序結束日期：2005.4.6
---程序調試完成日期：2005.4.13
---程序基本功能實現，能夠通過HPI實現對DSP存儲空間的訪問－讀寫。
---存在缺點：1、功能太簡單，一次僅僅能夠對單獨存儲空間的訪問。－－上位機的工作，已解決！
--- 2、讀取數據時，上位機沒能指定讀取地址。且讀出的數據只能半位有效。
--- 3、要實現對連續地址的連續訪問需要改變控制信號：HCNTL0,HCNTL1 －－問題已解決
--- 在訪問HPIC和HPIA后，HCNTL0和HCNTL1要固定在01上，使主機能夠
--- 實現對HPID的地址自增方式的訪問－－－問題已解決
--- 4、程序運行有待于繼續檢測，考察其穩定性
------------------------------------------------------------------------------------------
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -