;******************************************************************************
;               		SJTU DSP Tech. Center
;        Copyright (c) 2002 SJTU DSP Tech. Center. All Rights Reserved.
;  History:
;		Date		Authors			Changes
;		2003/08/30	Fu Xuan			Created.
;******************************************************************************

	.mmregs
;=================== McBSP register address==========================
;global registers
DRR20			.set		0x20
DRR10			.set		0x21
DXR20			.set		0x22
DXR10			.set		0x23
SPSA0			.set		0x38
SPSD0			.set		0x39

DRR21			.set		0x40
DRR11			.set		0x41
DXR21			.set		0x42
DXR11			.set		0x43
SPSA1			.set		0x48
SPSD1			.set		0x49

DRR22			.set		0x30
DRR12			.set		0x31
DXR22			.set		0x32
DXR12			.set		0x33
SPSA2			.set		0x34
SPSD2			.set		0x35

;SubAddress
SPCR1			.set		0x00
SPCR2			.set		0x01
RCR1			.set		0x02
RCR2			.set		0x03
XCR1			.set		0x04
XCR2			.set		0x05
SRGR1			.set		0x06
SRGR2			.set		0x07
MCR1			.set		0x08
MCR2			.set		0x09
RCERA			.set		0x0a
RCERB			.set		0x0b
XCERA			.set		0x0c
XCERB			.set		0x0d
PCR				.set		0x0e

;=================== DMA register address============================
;global registers
DMPREC			.set		0x54
DMSA			.set		0x55
DMSDI			.set		0x56
DMSDN			.set		0x57

;SubAddress
DMSRC0			.set		0x00
DMDST0			.set		0x01
DMCTR0			.set		0x02
DMSFC0			.set		0x03
DMMCR0			.set		0x04

DMSRC1			.set		0x05
DMDST1			.set		0x06
DMCTR1			.set		0x07
DMSFC1			.set		0x08
DMMCR1			.set		0x09

DMSRC2			.set		0x0a
DMDST2			.set		0x0b
DMCTR2			.set		0x0c
DMSFC2			.set		0x0d
DMMCR2			.set		0x0e

DMSRC3			.set		0x0f
DMDST3			.set		0x10
DMCTR3			.set		0x11
DMSFC3			.set		0x12
DMMCR3			.set		0x13

DMSRC4			.set		0x14
DMDST4			.set		0x15
DMCTR4			.set		0x16
DMSFC4			.set		0x17
DMMCR4			.set		0x18

DMSRC5			.set		0x19
DMDST5			.set		0x1a
DMCTR5			.set		0x1b
DMSFC5			.set		0x1c
DMMCR5			.set		0x1d

DMSRCP			.set		0x1e
DMDSTP			.set		0x1f
DMIDX0			.set		0x20
DMIDX1			.set		0x21
DMFRI0			.set		0x22
DMFRI1			.set		0x23

DMGSA			.set		0x24
DMGDA			.set		0x25
DMGCR			.set		0x26
DMGFR			.set		0x27

;===================CPLD register address in 5402 DSK BOARD =========
CNTL1			.set		0
STAT			.set		1
DMCNTL			.set		2
DBIO			.set		3
CNTL2			.set		4
SEMO			.set		5
SEMI			.set		6

;end of dsp_cnst.h54