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# Reading C:/Modeltech_5.8c/tcl/vsim/pref.tcl
# // ModelSim SE 5.8c Mar 01 2004
# //
# // Copyright Model Technology, a Mentor Graphics Corporation company, 2004
# // All Rights Reserved.
# // UNPUBLISHED, LICENSED SOFTWARE.
# // CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS THE
# // PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS.
# //
# do lms_test_tb.fdo
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vcom 5.8c Compiler 2004.03 Mar 25 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling entity cosfunc
# -- Compiling architecture cosfunc_a of cosfunc
# -- Loading package math_real
# -- Loading package iputils_std_logic_arith
# -- Loading package iputils_std_logic_unsigned
# -- Loading package prims_constants_v6_0
# -- Loading package c_shift_fd_v6_0_comp
# -- Loading package c_reg_fd_v6_0_comp
# -- Loading package c_sin_cos_v4_2_pack
# -- Loading package pipe_bhv_v4_2_comp
# -- Loading entity c_sin_cos_v4_2
# Model Technology ModelSim SE vcom 5.8c Compiler 2004.03 Mar 25 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling entity costest
# -- Compiling architecture costest_a of costest
# -- Loading package math_real
# -- Loading package iputils_std_logic_arith
# -- Loading package iputils_std_logic_unsigned
# -- Loading package prims_constants_v6_0
# -- Loading package c_shift_fd_v6_0_comp
# -- Loading package c_reg_fd_v6_0_comp
# -- Loading package c_sin_cos_v4_2_pack
# -- Loading package pipe_bhv_v4_2_comp
# -- Loading entity c_sin_cos_v4_2
# Model Technology ModelSim SE vcom 5.8c Compiler 2004.03 Mar 25 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling package pck_s2v
# -- Compiling package body pck_s2v
# -- Loading package pck_s2v
# Model Technology ModelSim SE vcom 5.8c Compiler 2004.03 Mar 25 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package pck_s2v
# -- Compiling entity lms
# -- Compiling architecture behav of lms
# -- Loading entity cosfunc
# -- Loading entity costest
# Model Technology ModelSim SE vcom 5.8c Compiler 2004.03 Mar 25 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity lms_test_tb
# -- Compiling architecture behavior of lms_test_tb
# -- Loading package pck_s2v
# -- Loading entity lms
# vsim -lib work -t 1ps lms_test_tb
# Loading C:\Modeltech_5.8c\win32/../std.standard
# Loading C:\Modeltech_5.8c\win32/../ieee.std_logic_1164(body)
# Loading C:\Modeltech_5.8c\win32/../ieee.std_logic_arith(body)
# Loading C:\Modeltech_5.8c\win32/../ieee.std_logic_unsigned(body)
# Loading work.pck_s2v(body)
# Loading work.lms_test_tb(behavior)
# Loading work.lms(behav)
# Loading C:\Modeltech_5.8c\win32/../ieee.math_real(body)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.iputils_std_logic_arith(body)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.iputils_std_logic_unsigned(body)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.prims_constants_v6_0
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_shift_fd_v6_0_comp
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_reg_fd_v6_0_comp
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_sin_cos_v4_2_pack(body)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.pipe_bhv_v4_2_comp
# Loading work.cosfunc(cosfunc_a)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_mux_bit_v6_0_comp
# Loading C:\Modeltech_5.8c\win32/../ieee.numeric_std(body)
# Loading C:\Modeltech_5.8c\win32/../std.textio(body)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.prims_utils_v6_0(body)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_sin_cos_v4_2(behavioral)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_shift_fd_v6_0(behavioral)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_reg_fd_v6_0(behavioral)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.c_mux_bit_v6_0(behavioral)
# Loading C:\Modeltech_5.8c\mylib\XilinxCoreLib.pipe_bhv_v4_2(behavioral)
# Loading work.costest(costest_a)
# .wave
# ** Warning: (vsim-WLF-5000) Log file vsim.wlf currently in use.
# File in use by: Chao.SEU Hostname: BILLGATES ProcessID: 2268
# Attempting to use alternate file "C:\DOCUME~1\CHAOSE~1.BIL\LOCALS~1\Temp\wlft28".
# ** Warning: (vsim-WLF-5001) Could not open log file vsim.wlf. Using C:\DOCUME~1\CHAOSE~1.BIL\LOCALS~1\Temp\wlft28 instead.
# .structure
# .signals
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
# Time: 6 ns Iteration: 1 Instance: /lms_test_tb/u1/u1/u0
# ** Warning: CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0.
# Time: 6 ns Iteration: 1 Instance: /lms_test_tb/u1/u1/u0
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
# Time: 6 ns Iteration: 1 Instance: /lms_test_tb/u1/u2/u0
# ** Warning: CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0.
# Time: 6 ns Iteration: 1 Instance: /lms_test_tb/u1/u2/u0
# ** Fatal: (vsim-3421) Value 64 is out of range 0 to 63.
# Time: 762 ns Iteration: 1 Process: /lms_test_tb/u1/generatetheta File: LMS.vhd
# Fatal error at LMS.vhd line 157
#
destroy .signals
destroy .structure
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