--
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
USE WORK.PCK_multiplier.ALL;


ENTITY test_test_vhd_tb IS
END test_test_vhd_tb;

ARCHITECTURE behavior OF test_test_vhd_tb IS 



	SIGNAL Adata :  std_logic_vector(6 downto 0);
	SIGNAL Bdata :  std_logic_vector(6 downto 0);
	SIGNAL dataOut :  std_logic_vector(13 downto 0);

BEGIN

        Adata <= "00001011";	 --Q6 +0.5
	   Bdata <= "00100000";	 --Q6 +0.5

        dataOut <= Adata*Bdata;

END;