#define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)#define FP_CALL_REG_P(REGNO)					\  (FP_REG_P (REGNO)						\   || (REGNO) == (4 + GP_REG_FIRST)				\   || (REGNO) == (6 + GP_REG_FIRST))/* Return number of consecutive hard regs needed starting at reg REGNO   to hold something of mode MODE.   This is ordinarily the length in words of a value of mode MODE   but can be less for certain modes in special long registers.   On the MIPS, all general registers are one word long. I have chosen to   use Floating point register pairs.  */#define HARD_REGNO_NREGS(REGNO, MODE)					\ ((MODE == SFmode) ? 2 :						\  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.   On the MIPS, all general registers can hold all  modes, except   FLOATING POINT.  */#define HARD_REGNO_MODE_OK(REGNO, MODE)					\  ((GET_MODE_CLASS (MODE) == MODE_INT || MODE == VOIDmode)		\	? (GP_REG_P (REGNO))						\	: (GET_MODE_CLASS (MODE) == MODE_FLOAT)				\		?  (((REGNO) & 1) == 0 && FP_CALL_REG_P (REGNO))	\		: 0)							\/* Value is 1 if it is a good idea to tie two pseudo registers   when one has mode MODE1 and one has mode MODE2.   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,   for any hard reg, then this must be 0 for correct output.  */#define MODES_TIEABLE_P(MODE1, MODE2)					\  (   ((MODE1) == SFmode || (MODE1) == DFmode)				\   == ((MODE2) == SFmode || (MODE2) == DFmode))/* MIPS pc is apparently not overloaded on a register.  *//* #define PC_REGNUM 15                                 *//* Register to use for pushing function arguments.  */#define STACK_POINTER_REGNUM 29/* Offset from the stack pointer to the first available location.  */#define STACK_POINTER_OFFSET 0/* Base register for access to local variables of the function.  */#define FRAME_POINTER_REGNUM 30/* Value should be nonzero if functions must have frame pointers.   Zero means the frame pointer need not be set up (and parms   may be accessed via the stack pointer) in functions that seem suitable.   This is computed in `reload', in reload1.c.   At present this is required if we are not a leaf procedure.  This   is because the .frame directive requires a register that does not   change throughout the procedure call, and until stack pushes are   folded into the initial stack allocation, we need an unvarying fp.  */#define FRAME_POINTER_REQUIRED (stack_args_pushed > 0)/* Base register for access to arguments of the function.  */#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM/* Register in which static-chain is passed to a function.  */#define STATIC_CHAIN_REGNUM 2/* Register in which address to store a structure value   is passed to a function.  */#define STRUCT_VALUE_REGNUM 4/* Mips registers used in prologue/epilogue code when the stack frame   is larger than 32K bytes.  These registers must come from the   scratch register set, and not used for passing and returning   arguments and any other information used in the calling sequence   (such as pic).  */#define MIPS_TEMP1_REGNUM 8#define MIPS_TEMP2_REGNUM 9/* Define NO_FUNCTION_CSE if it is as good or better to call a constant   function address than to call an address kept in a register.  */#define NO_FUNCTION_CSE/* Define the classes of registers for register constraints in the   machine description.  Also define ranges of constants.   One of the classes must always be named ALL_REGS and include all hard regs.   If there is more than one class, another class must be named NO_REGS   and contain no registers.   The name GENERAL_REGS must be the name of a class (or an alias for   another name such as ALL_REGS).  This is the class of registers   that is allowed by "g" or "r" in a register constraint.   Also, registers outside this class are allocated only when   instructions express preferences for them.   The classes must be numbered in nondecreasing order; that is,   a larger-numbered class must never be contained completely   in a smaller-numbered class.   For any two classes, it is very desirable that there be another   class that represents their union.  *//* The MIPS has general and floating point registers.  */enum reg_class  { NO_REGS, GR_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES } ;#define N_REG_CLASSES (int) LIM_REG_CLASSES#define GENERAL_REGS GR_REGS/* Give names of register classes as strings for dump file.   */#define REG_CLASS_NAMES							\ {"NO_REGS", "GR_REGS", "FP_REGS", "ALL_REGS" }/* Define which registers fit in which classes.   This is an initializer for a vector of HARD_REG_SET   of length N_REG_CLASSES.  */#define REG_CLASS_CONTENTS {{0x00000000, 0x00000000},			\                            {0xffffffff, 0x00000000},			\                            {0x00000000, 0xffffffff},			\			    {0xffffffff, 0xffffffff}}/* The same information, inverted:   Return the class number of the smallest class containing   reg number REGNO.  This could be a conditional expression   or could index an array.  */#define REGNO_REG_CLASS(REGNO) ((FP_REG_P (REGNO)) ? FP_REGS : GR_REGS)/* Define a table that lets us find quickly all the reg classes   containing a given one.  This is the initializer for an   N_REG_CLASSES x N_REG_CLASSES array of reg class codes.   Row N is a sequence containing all the class codes for   classes that contain all the regs in class N.  Each row   contains no duplicates, and is terminated by LIM_REG_CLASSES.  *//* We give just a dummy for the first element, which is for NO_REGS.  *//* #define REG_CLASS_SUPERCLASSES  {{LIM_REG_CLASSES},			\  {GR_REGS,ALL_REGS,LIM_REG_CLASSES},					\  {FP_REGS,ALL_REGS,LIM_REG_CLASSES},					\  {ALL_REGS,LIM_REG_CLASSES}						\}*//* We give just a dummy for the first element, which is for NO_REGS.  */#define REG_CLASS_SUPERCLASSES  {{LIM_REG_CLASSES},			\  {ALL_REGS,LIM_REG_CLASSES},						\  {ALL_REGS,LIM_REG_CLASSES},						\  {LIM_REG_CLASSES}							\}/* The inverse relationship:   for each class, a list of all reg classes contained in it.  */#define REG_CLASS_SUBCLASSES						\{{LIM_REG_CLASSES},							\  {GR_REGS,LIM_REG_CLASSES},						\  {FP_REGS,LIM_REG_CLASSES},\  {GR_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES}\}/* Define a table that lets us find quickly the class   for the subunion of any two classes.   We say "subunion" because the result need not be exactly   the union; it may instead be a subclass of the union   (though the closer to the union, the better).   But if it contains anything beyond union of the two classes,   you will lose!   This is an initializer for an N_REG_CLASSES x N_REG_CLASSES   array of reg class codes.  The subunion of classes C1 and C2   is just element [C1, C2].  */#define REG_CLASS_SUBUNION						\{{NO_REGS,  GR_REGS,   FP_REGS,  ALL_REGS},				\ {GR_REGS,  GR_REGS,   ALL_REGS, ALL_REGS},				\ {FP_REGS,  ALL_REGS,  FP_REGS,  ALL_REGS},				\ {ALL_REGS, ALL_REGS,  ALL_REGS, ALL_REGS}}/* The class value for index registers, and the one for base regs.  */#define INDEX_REG_CLASS GR_REGS#define BASE_REG_CLASS  GR_REGS				/* REGISTER AND CONSTANT CLASSES				 *//* Get reg_class from a letter such as appears in the machinedescription.  */				/* DEFINED REGISTER CLASSES:				**				** 'f'     : Floating point registers				** 'y'     : General register when used to				**           transfer chunks of Floating point				**           with mfc1 mtc1 insn				 */#define REG_CLASS_FROM_LETTER(C)					\   ((C) == 'f' ? FP_REGS:						\     (C) == 'y' ? GR_REGS:NO_REGS)/* The letters I, J, K, L and M in a register constraint string   can be used to stand for particular ranges of immediate operands.   This macro defines what the ranges are.   C is the letter, and VALUE is a constant value.   Return 1 if VALUE is in the range specified by C.  *//*   For MIPS, `I' is used for the range of constants an arithmetic insn                   can actually contain (16 bits signed integers).               `J' is used for the range which is just zero (since that is	           available as $R0).	       `K' is used for the range of constants a logical insn	           can actually contain (16 bit zero-extended integers).*/#define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)#define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)#define CONST_OK_FOR_LETTER_P(VALUE, C)					\  ((C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000			\   : (C) == 'J' ? (VALUE) == 0						\   : (C) == 'K' ? (unsigned) (VALUE) < 0x10000				\   : 0)/* Similar, but for floating constants, and defining letters G and H.   Here VALUE is the CONST_DOUBLE rtx itself.  */				/* DEFINED FLOATING CONSTANT CLASSES:				**				** 'G'     : Floating point 0				 */#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)				\  ((C) == 'G' && CONST_DOUBLE_LOW ((VALUE)) == 0			\   && CONST_DOUBLE_HIGH ((VALUE)) == 0)/* Given an rtx X being reloaded into a reg required to be   in class CLASS, return the class of reg to actually use.   In general this is just CLASS; but on some machines   in some cases it is preferable to use a more restrictive class.  */#define PREFERRED_RELOAD_CLASS(X,CLASS)					\    (((GET_MODE(X) == SFmode) || (GET_MODE(X) == DFmode))? FP_REGS  :	\     ((GET_MODE(X) == VOIDmode) ? GR_REGS :(CLASS)))/* Same but Mode has been extracted already*/#define PREFERRED_RELOAD_CLASS_FM(X,CLASS)				\    ((((X) == SFmode) || ((X) == DFmode))? FP_REGS  :			\     (((X) == VOIDmode) ? GR_REGS :(CLASS)))/* Return the maximum number of consecutive registers   needed to represent mode MODE in a register of class CLASS.  */#define CLASS_MAX_NREGS(CLASS, MODE)					\ ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2			\  : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 :1)			\  : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))/* Stack layout; function entry, exit and calling.  *//* Define this if pushing a word on the stack   makes the stack pointer a smaller address.  */#define STACK_GROWS_DOWNWARD/* Define this if the nominal address of the stack frame   is at the high-address end of the local variables;   that is, each additional local variable allocated   goes at a more negative offset in the frame.  */#define FRAME_GROWS_DOWNWARD/* Offset within stack frame to start allocating local variables at.   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the   first local allocated.  Otherwise, it is the offset to the BEGINNING   of the first local allocated.  */#define STARTING_FRAME_OFFSET -8/* If we generate an insn to push BYTES bytes,   this says how many the stack pointer really advances by.   On the vax, sp@- in a byte insn really pushes a word.  *//* #define PUSH_ROUNDING(BYTES) 0 *//* Offset of first parameter from the argument pointer register value.  */#define FIRST_PARM_OFFSET(FNDECL) 0/* Offset from top-of-stack address to location to store the   function parameter if it can't go in a register.   Addresses for following parameters are computed relative to this one.   It also has the effect of counting register arguments in the total   argument size. */#define FIRST_PARM_CALLER_OFFSET(FNDECL) 0/* When a parameter is passed in a register, stack space is still   allocated for it.  For the MIPS, stack space must be allocated, cf   Asm Lang Prog Guide page 7-8.   BEWARE that some space is also allocated for non existing arguments   in register. In case an argument list is of form GF used registers   are a0 (a2,a3), but we should push over a1...  */#define REG_PARM_STACK_SPACE/* Align stack frames on 64 bits (Double Word ).  */#define STACK_BOUNDARY 64/* Standard GCC stack related variables that we reference.  */extern int optimize;extern int may_call_alloca;extern int current_function_calls_alloca;extern int frame_pointer_needed;extern int flag_omit_frame_pointer;/* MIPS external variables defined in out-mips.c.  */extern char *reg_numchar[];		/* register names as $r2, etc. */extern char *current_function_name;	/* current function being compiled */extern int num_source_filenames;	/* current .file # */extern int inside_function;		/* != 0 if inside of a function */extern int stack_args_pushed;		/* max bytes pushed for calls */extern int stack_args_preallocated;	/* # bytes for args preallocated */extern int sdb_label_count;		/* block start/end next label # */extern int mips_section_threshold;	/* # bytes of data/sdata cutoff */extern int sym_lineno;			/* sgi next label # for each stmt *//* Make sure 16 bytes are always allocated on the stack.  */#ifndef STACK_ARGS_ADJUST#define STACK_ARGS_ADJUST(SIZE)						\{									\  if (SIZE.constant < 16)						\    SIZE.constant = 16;							\}#endif/* Value is 1 if returning from a function call automatically   pops the arguments described by the number-of-args field in the call.   FUNTYPE is the data type of the function (as a tree),   or for a library call it is an identifier node for the subroutine name.  */#define RETURN_POPS_ARGS(FUNTYPE) 0/* Symbolic macros for the registers used to return integer and floating   point values.  */#define GP_RETURN 2#define FP_RETURN 32/* Symbolic macros for the first/last argument registers.  */#define GP_ARG_FIRST 4#define GP_ARG_LAST  7#define FP_ARG_FIRST 44#define FP_ARG_LAST  47#define MAX_ARGS_IN_REGISTERS	4/* Define how to find the value returned by a library function   assuming the value has mode MODE.  */#define LIBCALL_VALUE(MODE)						\  gen_rtx (REG, MODE,							\	   (GET_MODE_CLASS (MODE) == MODE_FLOAT)			\		? FP_RETURN						\		: GP_RETURN)/* Define how to find the value returned by a function.   VALTYPE is the data type of the value (as a tree).   If the precise function being called is known, FUNC is its FUNCTION_DECL;   otherwise, FUNC is 0.  */#define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))/* 1 if N is a possible register number for a function value.   On the MIPS, R2 R3 and F0 F2 are the only register thus used.   Currently, R2 and F0 are only implemented  here (C has no complex type)  */#define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)