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?? tm-mips.h

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/* 1 if N is a possible register number for function argument passing.  */#define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST)   \				 || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \				     && (0 == (N) % 2)))/* A C expression which can inhibit the returning of certain function   values in registers, based on the type of value.  A nonzero value says   to return the function value in memory, just as large structures are   always returned.  Here TYPE will be a C expression of type   `tree', representing the data type of the value.   Note that values of mode `BLKmode' are returned in memory   regardless of this macro.  Also, the option `-fpcc-struct-return'   takes effect regardless of this macro.  On most systems, it is   possible to leave the macro undefined; this causes a default   definition to be used, whose value is the constant 0.   GCC normally converts 1 byte structures into chars, 2 byte   structs into shorts, and 4 byte structs into ints, and returns   them this way.  Defining the following macro overides this,   to give us MIPS cc compatibility.  */#define RETURN_IN_MEMORY(TYPE)	\  ((TREE_CODE (TYPE) == RECORD_TYPE) || (TREE_CODE (TYPE) == UNION_TYPE))/* Define a data type for recording info about an argument list   during the scan of that argument list.  This data type should   hold all necessary information about the function itself   and about the args processed so far, enough to enable macros   such as FUNCTION_ARG to determine where the next arg should go.*/typedef struct mips_args {  int gp_reg_found;  int arg_number;  int arg_words;} *CUMULATIVE_ARGS;/* Initialize a variable CUM of type CUMULATIVE_ARGS   for a call to a function whose data type is FNTYPE.   For a library call, FNTYPE is 0.*/extern void init_cumulative_args ();#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE)				\do {									\  CUM = (CUMULATIVE_ARGS) alloca (sizeof (*CUM));			\  init_cumulative_args (CUM, FNTYPE);					\} while (0)/* Update the data in CUM to advance over an argument   of mode MODE and data type TYPE.   (TYPE is null for libcalls where that information may not be available.)  */#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)			\  (function_arg_advance(CUM, MODE, TYPE, NAMED))extern void function_arg_advance();/* Determine where to put an argument to a function.   Value is zero to push the argument on the stack,   or a hard register in which to store the argument.   MODE is the argument's machine mode.   TYPE is the data type of the argument (as a tree).    This is null for libcalls where that information may    not be available.   CUM is a variable of type CUMULATIVE_ARGS which gives info about    the preceding args and about the function being called.   NAMED is nonzero if this argument is a named parameter    (otherwise it is an extra parameter matching an ellipsis).  */extern struct rtx_def *function_arg ();#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \  (function_arg(CUM, MODE, TYPE, NAMED))/* For an arg passed partly in registers and partly in memory,   this is the number of registers used.   For args passed entirely in registers or entirely in memory, zero.*/extern int function_arg_partial_nregs ();#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \  (function_arg_partial_nregs (CUM, MODE, TYPE, NAMED))/* This macro generates the assembly code for function entry.   FILE is a stdio stream to output the code to.   SIZE is an int: how many units of temporary storage to allocate.   Refer to the array `regs_ever_live' to determine which registers   to save; `regs_ever_live[I]' is nonzero if register number I   is ever used in the function.  This macro is responsible for   knowing which registers should not be saved even if used.  */extern void function_prologue ();#define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)/* This macro generates the assembly code for function exit,   on machines that need it.  If FUNCTION_EPILOGUE is not defined   then individual return instructions are generated for each   return statement.  Args are same as for FUNCTION_PROLOGUE.  */extern void function_epilogue ();#define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)/* Tell prologue and epilogue if Register containing return   address should be saved / restored.  */#define MUST_SAVE_REGISTER(regno) \ ((regs_ever_live[regno] && !call_used_regs[regno]) || \  (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) || \  (regno == 31 && regs_ever_live[31]))/* ALIGN FRAMES on double word boundaries */#define AL_ADJUST_ALIGN(LOC) (((LOC)+7) & 0xfffffff8)/* If the memory Address ADDR is relative to the frame pointer,   correct it to be relative to the stack pointer. This is for   when we don't use a frame pointer.   ADDR should be a variable name.  */#define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH)				\{ ADDR = mips_fix_frame_pointer(ADDR, DEPTH); }extern struct rtx_def *mips_fix_frame_pointer ();/* Output assembler code to FILE to increment profiler label # LABELNO   for profiling a function entry.  */#define FUNCTION_PROFILER(FILE, LABELNO)				\{									\  register char **reg_ptr = (TARGET_NAME_REGS) ? reg_names : reg_numchar; \									\  fprintf (FILE, "\t.set\tnoreorder\n");				\  fprintf (FILE, "\t.set\tnoat\n");					\  fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n",	\	   reg_ptr[1], reg_ptr[31]);					\  fprintf (FILE, "\tjal\t_mcount\n");					\  fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from  stack\n", \	   reg_ptr[STACK_POINTER_REGNUM], reg_ptr[STACK_POINTER_REGNUM]); \  fprintf (FILE, "\t.set\treorder\n");					\  fprintf (FILE, "\t.set\tat\n");					\}/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,   the stack pointer does not matter.  The value is tested only in   functions that have frame pointers.   No definition is equivalent to always zero.  */#define EXIT_IGNORE_STACK 1/* Addressing modes, and classification of registers for them.  *//* #define HAVE_POST_INCREMENT *//* #define HAVE_POST_DECREMENT *//* #define HAVE_PRE_DECREMENT *//* #define HAVE_PRE_INCREMENT *//* These assume that REGNO is a hard or pseudo reg number.   They give nonzero only if REGNO is a hard reg of the suitable class   or a pseudo reg currently allocated to a suitable hard reg.   These definitions are NOT overridden anywhere.  */#define REGNO_OK_FOR_INDEX_P(regno)					\((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)#define REGNO_OK_FOR_BASE_P(regno)					\((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx   and check its validity for a certain class.   We have two alternate definitions for each of them.   The usual definition accepts all pseudo regs; the other rejects them all.   The symbol REG_OK_STRICT causes the latter definition to be used.   Most source files want to accept pseudo regs in the hope that   they will get allocated to the class that the insn wants them to be in.   Some source files that are used after register allocation   need to be strict.  */#ifndef REG_OK_STRICT#define REG_OK_FOR_INDEX_P(X) 1		/* ok if index or pseudo reg */#define REG_OK_FOR_BASE_P(X)  1		/* ok if base reg. of pseudo reg */#else#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))#define REG_OK_FOR_BASE_P(X)  REGNO_OK_FOR_BASE_P  (REGNO (X))#endif/* Maximum number of registers that can appear in a valid memory address.  */#define MAX_REGS_PER_ADDRESS 1/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression   that is a valid memory address for an instruction.   The MODE argument is the machine mode for the MEM expression   that wants to use this address.   The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,   except for CONSTANT_ADDRESS_P which is actually machine-independent.  *//* 1 if X is an address that we could indirect through.  */#define INDIRECTABLE_ADDRESS_P(X)					\  (CONSTANT_ADDRESS_P (X)						\   || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))			\   || (GET_CODE (X) == PLUS						\       && ((xplus0 = XEXP (X, 0)),					\	   (xplus1 = XEXP (X, 1)),					\	   ((GET_CODE (xplus0) != REG && GET_CODE (xplus1) == REG)	\	    ? ((xplus0 = XEXP (X, 1)), (xplus1 = XEXP (X, 0)))		\	    : 0),							\	   GET_CODE (xplus0) == REG)					\       && REG_OK_FOR_BASE_P (xplus0)					\       && ((GET_CODE (xplus1) == CONST_INT && SMALL_INT (xplus1))	\	   || (GET_CODE (xplus1) == LABEL_REF)				\	   || (GET_CODE (xplus1) == SYMBOL_REF)				\	   || (GET_CODE (xplus1) == CONST)				\	   || (xplus0 == stack_pointer_rtx				\	       && (GET_CODE (xplus1) == CONST || (GET_CODE (xplus1) == SYMBOL_REF))))))#if 1extern void trace ();#define GO_PRINTF(x)	trace(x)#define GO_DEBUG_RTX(x) debug_rtx(x)#else#define GO_PRINTF(x)#define GO_DEBUG_RTX(x)#endif/* Go to ADDR if X is a valid address not using indexing.   (This much is the easy part.)  */#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)				\{									\  register rtx xinsn = (X);						\  register rtx xplus0, xplus1;						\									\  if (TARGET_DEBUGB_MODE)						\    {									\      GO_PRINTF ("\n==================== GO_IF_LEGITIMATE_ADDRESS\n");	\      GO_DEBUG_RTX (xinsn);						\    }									\									\  if (GET_CODE (xinsn) == REG)		goto ADDR;			\  if (INDIRECTABLE_ADDRESS_P (xinsn))   goto ADDR;			\									\  if (TARGET_DEBUGB_MODE)						\    GO_PRINTF ("Not a legitimate address\n");				\}#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)/* Nonzero if the constant value X is a legitimate general operand.   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.   At present, GAS doesn't understand li.[sd], so don't allow it   to be generated at present.  Also, the MIPS assembler does not   grok li.d Infinity.  */#define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE)/* Try machine-dependent ways of modifying an illegitimate address   to be legitimate.  If we find one, return the new, valid address.   This macro is used in only one place: `memory_address' in explow.c.   OLDX is the address as it was before break_out_memory_refs was called.   In some cases it is useful to look at this to decide what needs to be done.   MODE and WIN are passed so that this macro can use   GO_IF_LEGITIMATE_ADDRESS.   It is always safe for this macro to do nothing.  It exists to recognize   opportunities to optimize the output.   For the MIPS (so far ..), nothing needs to be done.   ACHTUNG this is actually used by the FLOW analysis to get rid   of statements....*/#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}/* Go to LABEL if ADDR (a legitimate address expression)   has an effect that depends on the machine mode it is used for.  */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}/* Specify the machine mode that this machine uses   for the index in the tablejump instruction.  */#define CASE_VECTOR_MODE SImode/* Define this if the tablejump instruction expects the table   to contain offsets from the address of the table.   Do not define this if the table should contain absolute addresses.  *//* #define CASE_VECTOR_PC_RELATIVE *//* Specify the tree operation to be used to convert reals to integers.  */#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR/* This is the kind of divide that is easiest to do in the general case.  */#define EASY_DIV_EXPR TRUNC_DIV_EXPR/* Define this as 1 if `char' should by default be signed; else as 0.  */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move from memory to memory   in one reasonably fast instruction.  */#define MOVE_MAX 4/* Nonzero if access to memory by bytes is slow and undesirable.  */#define SLOW_BYTE_ACCESS 0/* We assume that the store-condition-codes instructions store 0 for false   and some other value for true.  This is the value stored for true.  */#define STORE_FLAG_VALUE 1/* Declarations for condition code stuff.  */extern void compare_collect ();extern void compare_restore ();/* Define this if zero-extension is slow (more than one real instruction).  */#define SLOW_ZERO_EXTEND/* Define if shifts truncate the shift count   which implies one can omit a sign-extension or zero-extension   of a shift count.   Only 5 bits are used in SLLV and SRLV*/#define SHIFT_COUNT_TRUNCATED/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits   is done just by pretending it is already truncated.  */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* Specify the machine mode that pointers have.   After generation of rtl, the compiler makes no further distinction   between pointers and any other objects of this machine mode.  */#define Pmode SImode/* A function address in a call instruction   is a word address (for indexing purposes)   so give the MEM rtx a words's mode.  */#define FUNCTION_MODE SImode/* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and   memset, instead of the BSD functions bcopy and bzero.  */#if defined(MIPS_SYSV) || defined(OSF_OS)#define TARGET_MEM_FUNCTIONS#endif/* Compute the cost of computing a constant rtl expression RTX   whose rtx-code is CODE.  The body of this macro is a portion   of a switch statement.  If the code is computed here,   return it with a return statement.  Otherwise, break from the switch.  */#define CONST_COSTS(RTX,CODE)						\  case CONST_INT:							\    /* Constant zero is super cheap due to register 0.  */		\    if (RTX == const0_rtx) return 0;					\    if ((INTVAL (RTX) < 0x7fff) && (- INTVAL(RTX) < 0x7fff)) return 1;	\  case CONST:								\  case LABEL_REF:							\  case SYMBOL_REF:							\    return 3;								\

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