COPY_ONCE (X);						\	  XEXP (X, 1) = temp;						\	  return X; }							\      else if (GET_CODE (XEXP (X, 1)) == REG				\	       || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND		\		   && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG		\		   && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode))	\	{ register rtx temp = gen_reg_rtx (Pmode);			\	  register rtx val = force_operand (XEXP (X, 0), 0);		\	  emit_move_insn (temp, val);					\	  COPY_ONCE (X);						\	  XEXP (X, 0) = temp;						\	  return X; }}}/* Go to LABEL if ADDR (a legitimate address expression)   has an effect that depends on the machine mode it is used for.   On the 68000, only predecrement and postincrement address depend thus   (the amount of decrement or increment being the length of the operand).  */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)	\ if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL/* Specify the machine mode that this machine uses   for the index in the tablejump instruction.  */#define CASE_VECTOR_MODE HImode/* Define this if the tablejump instruction expects the table   to contain offsets from the address of the table.   Do not define this if the table should contain absolute addresses.  */#define CASE_VECTOR_PC_RELATIVE/* Specify the tree operation to be used to convert reals to integers.  */#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR/* This is the kind of divide that is easiest to do in the general case.  */#define EASY_DIV_EXPR TRUNC_DIV_EXPR/* Define this as 1 if `char' should by default be signed; else as 0.  */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move from memory to memory   in one reasonably fast instruction.  */#define MOVE_MAX 4/* Define this if zero-extension is slow (more than one real instruction).  */#define SLOW_ZERO_EXTEND/* Nonzero if access to memory by bytes is slow and undesirable.  */#define SLOW_BYTE_ACCESS 0/* Define if shifts truncate the shift count   which implies one can omit a sign-extension or zero-extension   of a shift count.  */#define SHIFT_COUNT_TRUNCATED/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits   is done just by pretending it is already truncated.  */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* We assume that the store-condition-codes instructions store 0 for false   and some other value for true.  This is the value stored for true.  */#define STORE_FLAG_VALUE -1/* When a prototype says `char' or `short', really pass an `int'.  */#define PROMOTE_PROTOTYPES/* Specify the machine mode that pointers have.   After generation of rtl, the compiler makes no further distinction   between pointers and any other objects of this machine mode.  */#define Pmode SImode/* A function address in a call instruction   is a byte address (for indexing purposes)   so give the MEM rtx a byte's mode.  */#define FUNCTION_MODE QImode/* Compute the cost of computing a constant rtl expression RTX   whose rtx-code is CODE.  The body of this macro is a portion   of a switch statement.  If the code is computed here,   return it with a return statement.  Otherwise, break from the switch.  */#define CONST_COSTS(RTX,CODE) \  case CONST_INT:						\    /* Constant zero is super cheap due to clr instruction.  */	\    if (RTX == const0_rtx) return 0;				\    if ((unsigned) INTVAL (RTX) < 077) return 1;		\  case CONST:							\  case LABEL_REF:						\  case SYMBOL_REF:						\    return 3;							\  case CONST_DOUBLE:						\    return 5;/* Tell final.c how to eliminate redundant test instructions.  *//* Here we define machine-dependent flags and fields in cc_status   (see `conditions.h').  *//* Set if the cc value is actually in the 68881, so a floating point   conditional branch must be output.  */#define CC_IN_68881 04000/* Store in cc_status the expressions   that the condition codes will describe   after execution of an instruction whose pattern is EXP.   Do not alter them if the instruction would not alter the cc's.  *//* On the 68000, all the insns to store in an address register   fail to set the cc's.  However, in some cases these instructions   can make it possibly invalid to use the saved cc's.  In those   cases we clear out some or all of the saved cc's so they won't be used.  *//* It was claimed recently that addq, subq to an address register   do update the cc's, but the 68000 and 68020 manuals say otherwise.  */#define NOTICE_UPDATE_CC(EXP, INSN) \{								\  /* If the cc is being set from the fpa and the     expression is not an explicit floating point     test instruction (which has code to deal with     this), reinit the CC */					\  if (((cc_status.value1 && FPA_REG_P (cc_status.value1))	\       || (cc_status.value2 && FPA_REG_P (cc_status.value2)))	\      && !(GET_CODE(EXP) == PARALLEL				\	   && GET_CODE (XVECEXP(EXP, 0, 0)) == SET		\	   && XEXP (XVECEXP (EXP, 0, 0), 0) == cc0_rtx))	\    { CC_STATUS_INIT; }						\  else if (GET_CODE (EXP) == SET)				\    { if (GET_CODE (SET_SRC (EXP)) == CALL)			\	{ CC_STATUS_INIT; }					\      else if (ADDRESS_REG_P (SET_DEST (EXP)))			\	{ if (cc_status.value1					\	      && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \	    cc_status.value1 = 0;				\	  if (cc_status.value2					\	      && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \	    cc_status.value2 = 0; }				\      else if (!FP_REG_P (SET_DEST (EXP))			\	       && SET_DEST (EXP) != cc0_rtx			\	       && (FP_REG_P (SET_SRC (EXP))			\		   || GET_CODE (SET_SRC (EXP)) == FIX		\		   || GET_CODE (SET_SRC (EXP)) == FLOAT_TRUNCATE \		   || GET_CODE (SET_SRC (EXP)) == FLOAT_EXTEND)) \	{ CC_STATUS_INIT; }					\      /* A pair of move insns doesn't produce a useful overall cc.  */ \      else if (!FP_REG_P (SET_DEST (EXP))			\	       && !FP_REG_P (SET_SRC (EXP))			\	       && GET_MODE_SIZE (GET_MODE (SET_SRC (EXP))) > 4	\	       && (GET_CODE (SET_SRC (EXP)) == REG		\		   || GET_CODE (SET_SRC (EXP)) == MEM		\		   || GET_CODE (SET_SRC (EXP)) == CONST_DOUBLE))\	{ CC_STATUS_INIT; }					\      else if (XEXP (EXP, 0) != pc_rtx)				\	{ cc_status.flags = 0;					\	  cc_status.value1 = XEXP (EXP, 0);			\	  cc_status.value2 = XEXP (EXP, 1); } }			\  else if (GET_CODE (EXP) == PARALLEL				\	   && GET_CODE (XVECEXP (EXP, 0, 0)) == SET)		\    {								\      if (ADDRESS_REG_P (XEXP (XVECEXP (EXP, 0, 0), 0)))	\	CC_STATUS_INIT;						\      else if (XEXP (XVECEXP (EXP, 0, 0), 0) != pc_rtx)		\	{ cc_status.flags = 0;					\	  cc_status.value1 = XEXP (XVECEXP (EXP, 0, 0), 0);	\	  cc_status.value2 = XEXP (XVECEXP (EXP, 0, 0), 1); } }	\  else CC_STATUS_INIT;						\  if (cc_status.value2 != 0					\      && ADDRESS_REG_P (cc_status.value2)			\      && GET_MODE (cc_status.value2) == QImode)			\    CC_STATUS_INIT;						\  if (cc_status.value2 != 0					\      && !(cc_status.value1 && FPA_REG_P (cc_status.value1)))	\    switch (GET_CODE (cc_status.value2))			\      { case PLUS: case MINUS: case MULT: case UMULT:		\	case DIV: case UDIV: case MOD: case UMOD: case NEG:	\	case ASHIFT: case LSHIFT: case ASHIFTRT: case LSHIFTRT:	\	case ROTATE: case ROTATERT:				\	  if (GET_MODE (cc_status.value2) != VOIDmode)		\	    cc_status.flags |= CC_NO_OVERFLOW;			\	  break;						\	case ZERO_EXTEND:					\	case ZERO_EXTRACT:					\	  /* (SET r1 (ZERO_EXTEND r2)) on this machine	     ends with a move insn moving r2 in r2's mode.	     Thus, the cc's are set for r2.	     This can set N bit spuriously. */			\	  cc_status.flags |= CC_NOT_NEGATIVE; }			\  if (cc_status.value1 && GET_CODE (cc_status.value1) == REG	\      && cc_status.value2					\      && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2))	\    cc_status.value2 = 0;					\  if (((cc_status.value1 && FP_REG_P (cc_status.value1))	\       || (cc_status.value2 && FP_REG_P (cc_status.value2)))	\      && !((cc_status.value1 && FPA_REG_P (cc_status.value1))	\	   || (cc_status.value2 && FPA_REG_P (cc_status.value2)))) \    cc_status.flags = CC_IN_68881; }#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV)  \do { if (cc_prev_status.flags & CC_IN_68881)			\       return FLOAT;						\     if (cc_prev_status.flags & CC_NO_OVERFLOW)			\       return NO_OV;						\     return NORMAL; } while (0)/* Control the assembler format that we output.  *//* Output at beginning of assembler file.  */#define ASM_FILE_START(FILE)	\  fprintf (FILE, "#NO_APP\n");/* Output to assembler file text saying following lines   may contain character constants, extra white space, comments, etc.  */#define ASM_APP_ON "#APP\n"/* Output to assembler file text saying following lines   no longer contain unusual constructs.  */#define ASM_APP_OFF "#NO_APP\n"/* Output before read-only data.  */#define TEXT_SECTION_ASM_OP ".text"/* Output before writable data.  */#define DATA_SECTION_ASM_OP ".data"/* How to refer to registers in assembler output.   This sequence is indexed by compiler's hard-register-number (see above).  */#define REGISTER_NAMES \{"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",	\ "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp",	\ "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \ "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \ "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \ "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \ "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31", }/* How to renumber registers for dbx and gdb.   On the Sun-3, the floating point registers have numbers   18 to 25, not 16 to 23 as they do in the compiler.  */#define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)/* This is how to output the definition of a user-level label named NAME,   such as the label on a static function or variable NAME.  */#define ASM_OUTPUT_LABEL(FILE,NAME)	\  do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)/* This is how to output a command to make the user-level label named NAME   defined for reference from other files.  */#define ASM_GLOBALIZE_LABEL(FILE,NAME)	\  do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)/* This is how to output a reference to a user-level label named NAME.   `assemble_name' uses this.  */#define ASM_OUTPUT_LABELREF(FILE,NAME)	\  fprintf (FILE, "_%s", NAME)/* This is how to output an internal numbered label where   PREFIX is the class of label and NUM is the number within the class.  */#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\  fprintf (FILE, "%s%d:\n", PREFIX, NUM)/* This is how to store into the string LABEL   the symbol_ref name of an internal numbered label where   PREFIX is the class of label and NUM is the number within the class.   This is suitable for output with `assemble_name'.  */#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)	\  sprintf (LABEL, "*%s%d", PREFIX, NUM)/* This is how to output an assembler line defining a `double' constant.  */#define ASM_OUTPUT_DOUBLE(FILE,VALUE)  \  fprintf (FILE, "\t.double 0r%.20g\n", (VALUE))/* This is how to output an assembler line defining a `float' constant.  *//* Sun's assembler can't handle floating constants written as floating.   However, when cross-compiling, always use that in case format differs.  */#ifdef CROSS_COMPILER#define ASM_OUTPUT_FLOAT(FILE,VALUE)  \  fprintf (FILE, "\t.float 0r%.10g\n", (VALUE))#else#define ASM_OUTPUT_FLOAT(FILE,VALUE)  \do { union { float f; long l;} tem;			\     tem.f = (VALUE);					\     fprintf (FILE, "\t.long 0x%x\n", tem.l);	\   } while (0)#endif /* not CROSS_COMPILER *//* This is how to output an assembler line defining an `int' constant.  */#define ASM_OUTPUT_INT(FILE,VALUE)  \( fprintf (FILE, "\t.long "),			\  output_addr_const (FILE, (VALUE)),		\  fprintf (FILE, "\n"))/* Likewise for `char' and `short' constants.  */#define ASM_OUTPUT_SHORT(FILE,VALUE)  \( fprintf (FILE, "\t.word "),			\  output_addr_const (FILE, (VALUE)),		\  fprintf (FILE, "\n"))#define ASM_OUTPUT_CHAR(FILE,VALUE)  \( fprintf (FILE, "\t.byte "),			\  output_addr_const (FILE, (VALUE)),		\  fprintf (FILE, "\n"))/* This is how to output an assembler line for a numeric constant byte.  */#define ASM_OUTPUT_BYTE(FILE,VALUE)  \  fprintf (FILE, "\t.byte 0x%x\n", (VALUE))/* This is how to output an insn to push a register on the stack.