/*****************************************************************************/
/*                                             COPYRIGHT (c) MOTOROLA 2002   */
/*                                                                           */
/* File Name          :    $RCSfile: s12_spi.h,v $							 */
/*                                                                           */
/* Current Revision :      $Revision: 1.2 $                                  */
/*                                                                           */
/* PURPOSE: header file for HCS12 SPI register block	   			 		 */
/*                                                                           */
/*  ***********************************************************************  */
/*  *  THIS CODE IS ONLY INTENDED AS AN EXAMPLE OF CODE FOR THE           *  */
/*  *  METROWERKS COMPILER AND THE STAR12 EVB AND HAS ONLY BEEN GIVEN A   *  */
/*  *  MIMIMUM LEVEL OF TEST. IT IS PROVIDED 'AS SEEN' WITH NO GUARANTEES *  */
/*  *  AND NO PROMISE OF SUPPORT.                                         *  */
/*  ***********************************************************************  */
/*                                                                           */
/*                                                                           */
/* DESCRIPTION:  Defines the SPI register block as a datastructure           */
/*               of type tSPI.                                               */
/* 																		     */
/* SPI module base address (out of reset) -                                  */
/*                                                                           */
/* S12DP256      (SPI0) 0x00D8, (SPI1) 0x00F0, (SPI2) 0x00F8                 */
/*																			 */
/* The datastructure compiled can be determined by the #define's S12DP256,   */
/* S12xxx, etc. These definitions can be found in "s12_common.h".            */
/* The MCU id can be #defined in a "target.h" header file or included as a   */
/* complier command line argument as -DS12DP256.                             */
/* Currently only S12DP256 is supported.									 */
/*																			 */
/* Multiple register descriptions are used when a differing bit structure    */
/* exists between parts. In the case of additional bit definitions within    */
/* the same register, then only the full register description is used.       */
/*                                                                           */
/*                                                                           */
/* AUTHOR: R32151            LOCATION: SPSEKB      LAST EDIT DATE: 14/03/02  */
/*                                                                           */
/* UPDATE HISTORY                                                            */
/* REV  AUTHOR       DATE       DESCRIPTION OF CHANGE                        */
/* ---  ------      --------    ---------------------                        */
/* 1.00	r32151  	09/05/00                                                 */
/* 1.01 r32151  	10/05/00 	- added reserved word to fill out back end   */
/*                                of module memory map		                 */
/*     							- Changed #include <s12_common.h> 		     */
/* 							      to #include "s12_common.h"				 */
/* 1.1  r32151      11/03/02	- Added disclaimer and reformated file info. */
/*                              - Modified revision numbering to match RCS   */
/* 1.2  r32151      14/03/02	- Declared all registers volatile 	 		 */
/*                              - changed tU08 declarations in structure to  */
/*                                tREG08 to standardise all accesses as      */
/*                                using .bit or .byte format                 */
/*                                                                           */
/*===========================================================================*/
/* Motorola reserves the right to make changes without further notice to any */
/* product herein to improve reliability, function, or design. Motorola does */
/* not assume any  liability arising  out  of the  application or use of any */
/* product,  circuit, or software described herein;  neither  does it convey */
/* any license under its patent rights  nor the  rights of others.  Motorola */
/* products are not designed, intended,  or authorized for use as components */
/* in  systems  intended  for  surgical  implant  into  the  body, or  other */
/* applications intended to support life, or  for any  other application  in */
/* which the failure of the Motorola product  could create a situation where */
/* personal injury or death may occur. Should Buyer purchase or use Motorola */
/* products for any such intended  or unauthorized  application, Buyer shall */
/* indemnify and  hold  Motorola  and its officers, employees, subsidiaries, */
/* affiliates,  and distributors harmless against all claims costs, damages, */
/* and expenses, and reasonable  attorney  fees arising  out of, directly or */
/* indirectly,  any claim of personal injury  or death  associated with such */
/* unintended or unauthorized use, even if such claim alleges that  Motorola */
/* was negligent regarding the  design  or manufacture of the part. Motorola */
/* and the Motorola logo* are registered trademarks of Motorola Ltd.         */
/*****************************************************************************/


#ifndef S12_SPI_H			/*prevent duplicated includes */
#define S12_SPI_H

#ifndef S12_COMMON_H		/*prevent duplicated includes */
#include "s12_common.h"
#endif

typedef union uSPICR1
  {
  tU08	byte;
  struct
    {
    tU08 lsbf	:1;		/*lsb first enable */
    tU08 ssoe	:1;		/*slave select output enable */
    tU08 cpha	:1;		/*clock phase */
    tU08 cpol	:1;		/*clock polarity */
    tU08 mstr	:1;		/*master/slave mode select */
    tU08 sptie	:1;		/*transmit interrupt enable */
    tU08 spe 	:1;		/*spi enable */
    tU08 spie	:1;		/*spi interrupt enable */
    }bit;
  }tSPICR1;

#define LSBF	0x01	/*bit masks	*/
#define SSOE	0x02
#define CPHA	0x04
#define CPOL	0x08
#define MSTR	0x10
#define SPTIE	0x20
#define SPE		0x40
#define SPIE	0x80

typedef union uSPICR2
  {
  tU08	byte;
  struct
    {
    tU08 spc0	 :1;	/*serial pin control 0 */
    tU08 spiswai :1;	/*stop in wait mode	*/
    tU08 		 :1;	/*not used */
    tU08 bidiroe :1;	/*bi-directional mode output enable */
    tU08 modfen	 :1;	/*mode fault enable	*/
    tU08		 :3;	/*not used */
    }bit;
  }tSPICR2;

#define SPC0	0x01	/*bit masks	*/
#define SPISWAI	0x02
#define BIDIROE	0x08
#define MODFEN	0x10


typedef union uSPIBR
  {
  tU08	byte;
  struct
    {
    tU08 spr	:3;		/*baud rate selection */
    tU08 		:1;		/*not used*/								   
    tU08 sspr	:3;		/*baud rate pre-selection */
    tU08 		:1;		/*not used */									   
    }bit;
  }tSPIBR;

#define SPR0	0x01	/*bit masks	*/
#define SPR1	0x02
#define SPR2	0x04
#define SPR		0x07	/*baud rate selection mask */
#define SSPR0	0x10
#define SSPR1	0x20
#define SSPR2	0x40	
#define SSPR	0x70	/*baud rate pre-selection mask */

typedef union uSPISR
  {
  tU08	byte;
  struct
    {
    tU08		:4;		/*not used */
    tU08 modf	:1;		/*mode error interrupt status flag */
    tU08 sptef	:1;		/*transmit empty interrupt flag */
	tU08		:1;		/*not used */
    tU08 spif	:1;		/*spi interrupt request	*/
    }bit;
  }tSPISR;

#define MODF	0x10	/*bit masks	*/
#define SPTEF	0x20
#define SPIF	0x80


typedef struct				/*spi datastructure	*/
  {
  volatile tSPICR1	spicr1;	/*spi control register 1 */
  volatile tSPICR2	spicr2;	/*spi control register 2 */
  volatile tSPIBR	spibr;	/*spi baud rate register */
  volatile tSPISR	spisr;	/*spi status register */
           tU08		sv;		/*reserved (maintaining memory map)	*/
  volatile tREG08	spidr;	/*spi data register	*/
           tU16		sv2;	/*reserved (maintaining module memory map) */
  }tSPI;

#endif /*S12_SPI_H */